Patents
In this page we list the issued and pending patents and copyrights produced by the researchers of the Nanoscape Lab. Note that the status of some of the issued patents are not yet updated in the USPTO site. The underlined inventors are graduate/undergraduate students of the Nanoscape lab.
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US-12561409-B2, Multi-layered framework for security of integrated circuits, Inventors: Swarup Bhunia, Aritra Dasgupta, Reiner Dizon, Aritra Bhattacharya, and Rasheed Almawzan, Granted on: 2/24/2026, Pages: 24.
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US-12561240-B2, Look-up table-based in-memory computing system, Inventors: Baibhab Chatterjee, Swarup Bhunia, and Peyman Deghanzadeh, Granted on: 2/24/2026, Pages: 26.
[Abstract | PDF] - US-12470221-B2, Programmable application-specific array for protecting confidentiality and integrity of hardware IPs, Inventors: Swarup Bhunia, Aritra Dasgupta, Pravin Gaikwad, Md Moshiur Rahman, Aritra Bhattacharya, Nij Dorairaj, David Kehlet, Granted on: 11/11/2025, Pages: 49.
[Abstract | PDF] - US-12475263-B2, Electromagnetic based secure contact-less integrity verification of hardware and/or software for integrated circuits, Inventors: Swarup Bhunia, Jonathan Cruz, Junjun Huan and Soumyajit Mandal, Granted on: 11/18/2025, Pages: 29.
[Abstract | PDF] - US-12329216-B2, System and method for closed-loop active sensing and protection against airborne pathogens, Inventors: Naren Vikram Raj Masna, Swarup Bhunia, Soumyajit Mandal, Anamika Bhuniaroy, and Rohan Reddy Kalavakonda, Publication date: 6/17/2025, Pages: 37.
[Abstract | PDF] - US-11890957-B2, System and method for a battery on wheels (BoW) for charging mobile battery-operated units, Inventors: Swarup Bhunia, Prabuddha Chakraborty, and Christopher Vega, Publication date: 02/06/2024, Pages: 67.
[Abstract | PDF] - US-12049151-B2, Multi-level battery systems for battery-operated entities, methods for rapid charge transfer there between, and methods for optimizing entity routing and network charge distribution, Inventors: Swarup Bhunia, Prabuddha Chakraborty, Rohan Reddy Kalavakonda, Robert Parker, and Shuo Wang, Publication date: 07/30/2024, Pages: 108.
[Abstract | PDF] - US-12210663-B2, Decommissioning and erasing entropy in microelectronic systems, Inventors: Abdulrahman Alaql and Swarup Bhunia, Publication date: 1/28/2025, Pages: 22.
[Abstract | PDF] - US-12123912-B2, Reconfigurable JTAG architecture for implementation of programmable hardware security features in digital designs, Inventors: Christopher Vega, Patanjali SLPSK, and Swarup Bhunia, Publication date: 10/22/2024, Pages: 20.
[Abstract | PDF] - US-12118282-B2, Removal of hardware intellectual property and programmable replacement, Inventors: Swarup Bhunia, Abdulrahman Alaql, Nij Dorairaj, and David Kehlet, Publication date: 10/15/2024, Pages: 23.
[Abstract | PDF] - US-12058238-B2, Predictive joint compression and encryption for images and videos, Inventors: Swarup Bhunia, Prabuddha Chakraborty, Jonathan Cruz, Tamzidul Hoque, and Toan Trung Nguyen, Publication date: 8/6/2024, Pages: 43.
[Abstract | PDF] - US-12024201-B2, Smart infrastructures and first-responder network for security and safety hazards, Inventors: Prabuddha Chakraborty, Reiner Dizon, Christopher Vega, Joel B. Harley, Sandip Ray, Swarup Bhunia, and Patanjali SLPSK, Publication date: 7/2/2024, Pages: 30.
[Abstract | PDF] - US-12026290-B2, Steganography of hardware intellectual property, Inventors: Abdulrahman Alaql and Swarup Bhunia, Publication date: 7/2/2024, Pages: 22.
[Abstract | PDF] - US-11978023-B2, Drone-based administration of remotely located instruments and gadgets, Inventors: Swarup Bhunia, Prabuddha Chakraborty, Reiner Dizon, Parker Difuntorum, Christopher Vega, and Patanjali SLPSK, Publication date: 5/7/2024, Pages: 32.
[Abstract | PDF] - US-11954201-B2, Framework for obfuscation-based watermarking, Inventors: Swarup Bhunia, Tamzidul Hoque, Abhishek Anil Nair, and Patanjali SLPSK, Publication date: 4/9/2024, Pages: 15.
[Abstract | PDF] - US-11953548-B2, Invisible scan architecture for secure testing of digital designs, Inventors: Swarup Bhunia, Pravin Dasharth Gaikwad, Jonathan Cruz, and Sudipta Paria, Publication date: 4/9/2024, Pages: 20.
[Abstract | PDF] - US-11899827-B2, Establishing trust in untrusted IC testing and provisioning environment, Inventors: Swarup Bhunia, Atul Prasad Debnath, Kshitij Raj, Sandip Ray, and Patanjali SLPSK, Publication date: 2/13/2024, Pages: 23.
[Abstract | PDF] - US-11873214-B2, Nano-electro-mechanical tags for identification and authentication, Inventors: Roozbeh Tabrizian and Swarup Bhunia, Publication date: 1/16/2024, Pages: 18.
[Abstract | PDF] - US-11720654-B2, Timed unlocking and locking of hardware intellectual properties, Inventors: Bhunia; Swarup Bhunia, Abdulrahman Alaql, Aritra Dasgupta, and Md Moshiur Rahman, Publication date: 8/8/2023, Pages: 23.
[Abstract | PDF] - US-11671100-B2, Memory in logic physical unclonable function, Inventors: Swarup Bhunia, Christopher Vega, and Shubhra Deb Paul, Publication date: 6/6/2023, Pages: 24.
[Abstract | PDF] - US-11657127-B2, Hardware intellectual property protection through provably secure state-space obfuscation, Inventors: Swarup Bhunia, Md Moshiur Rahman, and Abdulrahman Alaql, Publication date: 5/23/2023, Pages: 49.
[Abstract | PDF] - US-11480614-B2, Side-channel signature-based PCB authentication using JTAG architecture and a challenge-response mechanism, Inventors: Swarup Bhunia and Shubhra Deb Paul, Publication date: 10/25/2022, Pages: 32.
[Abstract | PDF] - US-11856096-B2, Defense of JTAG I/O network, Inventors: Swarup Bhunia, Christopher Vega, Subhra Deb Paul, Parker Difuntorum, Reiner Dizon, and Patanjali SLPSK, Publication date: 12/26/2023, Pages: 23.
[Abstract | PDF] - US-11797736-B2, SARO: scalable attack-resistant obfuscation of logic circuits, Inventors: Swarup Bhunia and Abdulrahman Alaql, Publication date: 10/24/2023, Pages: 24.
[Abstract | PDF] - US-11419533-B2, Bladder event detection for diagnosis of urinary incontinence or treatment of lower urinary tract dysfunction, Inventors: Margot Damaser, Swarup Bhunia, Robert Karam, Steve Majerus, Dennis Bourbeau, and Hui Zhu, Publication date: 8/23/2022, Pages: 26.
[Abstract | PDF] - US-11376979-B2, System and method for charging a network of mobile battery-operated units on-the-go, Inventors: Prabuddha Chakraborty and Swarup Bhunia, Publication date: 7/5/2022, Pages: 66.
[Abstract | PDF] - US-11549897-B2, System and method for hand-held NQR-based in-field screening of substances, Inventors: Swarup Bhunia, Naren Vikram Raj Masna, Soumyajit Mandal, and David Joseph Ariando, Publication date: 1/10/2023, Pages: 20.
[Abstract | PDF] - US-11341283-B2, Learning guided obfuscation framework for hardware IP protection, Inventors: Abdulrahman Alaql, Saranyu Chattopadhyay, Swarup Bhunia, and Prabuddha Chakraborty, Publication date: 5/24/2022, Pages: 43.
[Abstract | PDF] - US-11321510-B2, Systems and methods for machine intelligence based malicious design alteration insertion, Inventors: Swarup Bhunia, Prabuddha Chakraborty, Abhishek A Nair, Tamzidul Hoque, Jonathan W. Cruz, Naren Masna, and Pravin Gaikwad, Publication date: 5/3/2022, Pages: 28.
[Abstract | PDF] - US-11314953-B2, Tagging of materials and objects and analysis for authentication thereof, Inventors: Swarup Bhunia, Naren Vikram Masna, and Soumyajit Mandal, Publication date: 4/26/2022, Pages: 32.
[Abstract | PDF] - US-11183068-B2, Multi-purpose context-aware bump (CAB) supporting dynamic adaptation of form factors and functionality, Inventors: Swarup Bhunia, Prabuddha Chakraborty, Lili Du and Sandip Ray, Publication date: 11/23/2021, Pages: 17.
[Abstract | PDF] - US-11144648-B2, Trojan insertion tool, Inventors: Swarup Bhunia, Jonathan W. Cruz, and Prabhat Kumar Mishra, Publication date: 10/12/2021, Pages: 21.
[Abstract | PDF] - US-10521600-B2, Reconfigurable system-on-chip security architecture, Inventors: Swarup Bhunia and Atul Prasad Debnath, Publication date: 12/31/2019, Pages: 18.
[Abstract | PDF] - US-11017125-B2, Uniquified FPGA virtualization approach to hardware security, Inventors: Greg Stitt, Kai Yang, Swarup Bhunia, and Robert A. Karam, Publication date: 5/25/2021, Pages: 13.
[Abstract | PDF] - US-10837926-B2, Multi-modal spectroscopic analysis, Inventors: Soumyajit Mandal, Swarup Bhunia, Naren Vikram Raj Masna, Cheng Chen, Mason Greer, and Fengchao Zhang, Publication date: 11/17/2020, Pages: 19.
[Abstract | PDF] - US-10586135-B2, Nano-electro-mechanical labels and encoder, Inventors: Roozbeh Tabrizian and Swarup Bhunia, Publication date: 3/10/2020, Pages: 9.
[Abstract | PDF] - US-10478113-B2, Bladder event detection for diagnosis of urinary incontinence or treatment of lower urinary tract dysfunction, Inventors: Margot S Damaser, Swarup Bhunia, Robert Karam; Robert (Gainesville, FL), Majerus; Steve (Akron, OH), Bourbeau; Dennis (Cleveland, OH), Zhu; Hui, Publication date: 11/19/2019, Pages: 26.
[Abstract | PDF] - US-10283459-B2, Vanishing via for hardware IP protection from reverse engineering, Inventors: Swarup Bhunia, Haoting Shen, Mark Tehranipoor, Domenic Forte, and Navid Asadizanjani, Publication date: 5/7/2019, Pages: 12.
[Abstract | PDF] - US-10216965-B2, Systems and methods for generating physically unclonable functions from non-volatile memory cells, Inventors: James Plusquellic and Swarup Bhunia, Publication date: 2/26/2019, Pages: 25.
[Abstract | PDF] - US-9685958-B2, Defense against counterfeiting using antifuses, Inventors: Swarup Bhunia, Abhishek Basak, and Yu Zheng, Publication date: 6/20/2017, Pages: 17.
[Abstract | PDF] - US-9628086-B2, Nanoelectromechanical antifuse and related systems, Inventors: Ting He, Fengchao Zhang, Swarup Bhunia, and Philip X.-L. Feng, Publication date: 4/18/2017, Pages: 16.
[Abstract | PDF] - US-8402401-B2, Protection of intellectual property cores through a design flow, Inventors: Rajat Subhra Chakraborty, Seetharam Narasimhan, and Swarup Bhunia, Publication date: 3/19/2013, Pages: 34.
[Abstract | PDF] - US-7548473-B2, Apparatus and methods for determining memory device faults, Inventors: Qikai Chen, Swarup Bhunia, Hamid Mahmoodi, and Kaushik Roy, Publication date: 6/16/2009, Pages: 14.
[Abstract | PDF] - US-7454738-B2, Synthesis approach for active leakage power reduction using dynamic supply gating, Inventors: Swarup Bhunia, Nilanjan Banerjee, Hamid Mahmoodi, Qikai Chen and Kaushik Roy, Publication date: 11/18/2008, Pages: 30.
[Abstract | PDF] - US-7319343-B2, Low power scan design and delay fault testing technique using first level supply gating, Inventors: Swarup Bhunia, Hamid Mahmoodi, Arijit Raychowdhury, Saibal Mukhopadhyay, and Kaushik Roy, Publication date: 1/15/2008, Pages: 23.
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- US-20250173264-A1, Learning memory systems and methods, Inventors: Swarup Bhunia and Prabuddha Chakraborty, Publication Date: 5/29/2025, Pages: 60.
[Abstract | PDF] - US-20230331113-A1, Framework for sustainable recharging of battery electric vehicles with near-perpetual mobility, Inventors: Swarup Bhunia, Prabuddha Chakraborty, and Reiner Dizon, Publication Date: 10/19/2023, Pages: 49.
[Abstract | PDF] - US-20240104362-A1, Spatio-temporal intelligent digital memory systems and methods, Inventors: Swarup Bhunia and Prabuddha Chakraborty, Publication Date: 03/28/2024, Pages: 50.
[Abstract | PDF] - US-20240154788-A1, Bitstream initialization for reconfigurable hardware, Inventors: Swarup Bhunia and Pravin Dasharth Gaikwad, Publication Date: 5/9/2024, Pages: 22.
[Abstract | PDF] - US-20250384197-A1, Reconfigurable security fabric for securing digital circuit designs, Inventors: Swarup Bhunia, Aritra Dasgupta, Atri Chatterjee, Sudipta Paria, and Habibur Rahaman, Publication Date: 12/18/2025, Pages: 55.
[Abstract | PDF] - US-20260039485-A1, Multi-bit memory-based physically unclonable function, Inventors: Swarup Bhunia, Atri Chatterjee, and Peyman Deghanzadeh, Publication Date: 05/02/2026, Pages: 35.
[Abstract | PDF] - US-20250131234-A1, Systems and methods for interfacing natural intelligence with artificial intelligence, Inventors: Swarup Bhunia, Rohan Kalavakonda, Aritra Dasgupta, Archit Jaiswal, Junjun Huan, and Peyman Deghanzadeh, Publication Date: 4/24/2025, Pages: 58.
[Abstract | PDF] - US-20240335138-A1, IoT-based podiatric activity tracking and recommendation system, Inventors: Swarup Bhunia, Reiner Dizon-Paradis, and R. James Toussaint, Publication Date: 10/10/2024, Pages: 31.
[Abstract | PDF] - US-20240234345-A1, Systems and methods for providing distributed batteries in integrated circuits, Inventors: Swarup Bhunia and Peyman Deghanzadeh, Publication Date: 7/11/2024, Pages: 29.
[Abstract | PDF] - US-20240232491-A1, Apparatus, systems and methods for programmable logic macros, Inventors: Swarup Bhunia, Pravin Dasharth Gaikwad, Jonathan William Cruz, and Peyman Deghanzadeh, Publication Date: 7/11/2024, Pages: 38.
[Abstract | PDF] - US-20240201257-A1, Automated test pattern generation for testing design redacting reconfigurable hardware, Inventors: Greg M. Stitt, Swarup Bhunia, Naren Vikram Raj Masna, and Aritra Dasgupta, Publication Date: 6/20/2024, Pages: 24.
[Abstract | PDF] - US-20230394209-A1, Functional verification flow of obfuscated designs for circuits, Inventors: Swarup Bhunia, Sandip Ray, Moshiur Rahman, and Maneesh Merugu, Publication Date: 12/7/2023, Pages: 15.
[Abstract | PDF] - US-20230029652-A1, Learning-rooted IoT platform, Inventors: Swarup Bhunia, Reiner Dizon, Prabuddha Chakraborty, Rohan Reddy Kalavakonda, and Parker Difuntorum, Publication Date: 2/2/2023, Pages: 59.
[Abstract | PDF] - US-20190305927-A1, Bitstream security based on node locking, Inventors: Swarup Bhunia, Robert A. Karam, and Tamzidul Hoque, Publication Date: 10/3/2019, Pages: 29.
[Abstract | PDF] - US-20160047855-A1, PCB authentication and counterfeit detection, Inventors: Swarup Bhunia, Fengchao Zhang, Yu Zheng, and Andrew Hennessy, Publication Date: 02/18/2016, Pages: 27.
[Abstract | PDF]
- UF# 17542. Copyright, Swarup Bhunia, Prabuddha Chakraborty, Jonathan Cruz, Tamzidul Hoque, “VIPR: A CAD Framework for Machine Learning based Hardware IP Trust Verification,” U.S. Copyright Registration, Disclosure Date Oct. 1. 2018.
- UF# 17369. Copyright, Jonathan Cruz and Swarup Bhunia, “SLOT: Statistical Logic Testing for Hardware Trojan Detection”, filed in May 2018, at University of Florida.
- UF# 17303. Copyright, Yuanwen Huang, Prabhat Mishra, and Swarup Bhunia, “MERS: Statistical Test Generation for Side-Channel Analysis Based Trojan Detection”, filed in May 2018, at University of Florida.
- UF# 17357. Copyright, Jonathan Cruz, Prabhat Mishra, and Swarup Bhunia, “TRIT: Trojan Insertion Tool”, filed in May 2018, at University of Florida.