{"id":639,"date":"2025-05-13T17:27:27","date_gmt":"2025-05-13T17:27:27","guid":{"rendered":"https:\/\/swarup.ece.ufl.edu\/?page_id=639"},"modified":"2026-04-13T09:04:21","modified_gmt":"2026-04-13T14:04:21","slug":"publications","status":"publish","type":"page","link":"https:\/\/faculty.eng.ufl.edu\/swarup\/publications\/","title":{"rendered":"Publications"},"content":{"rendered":"\n<section class=\"title-block w-100\"><div class=\"container-fluid page-title-container\"><div class=\"title-wrapper\"><h1 class=\"font-heading\">Publications<\/h1><hr \/><p><em>In this page we list the refereed and non-refereed (invited full paper or abstract) publications produced by the researchers of the Nanoscape Lab. The <span style=\"text-decoration: underline\">underlined<\/span> authors are graduate\/undergraduate students of the Nanoscape lab.<\/em><\/p><\/div><\/div><\/section>\n\n\n\n<div class=\"wp-block-create-block-accordion-block\"><section class=\"accordion-section mb-5\"><div class=\"container-fluid\"><div class=\"row-fluid\"><div class=\"accordion openFirst\" id=\"parentf041e447-8d81-43c6-8438-14a4c01bc71b\">\n<div class=\"wp-block-create-block-accordion-block-inner selected\"><div class=\"accordion-item\"><span class=\"accordion-header\" id=\"heading8c44230e-b3cd-4db2-837c-fc24256fe674\"><button class=\"accordion-button collapsed\" type=\"button\" data-bs-toggle=\"collapse\" data-bs-target=\"#collapse8c44230e-b3cd-4db2-837c-fc24256fe674\" aria-expanded=\"false\" aria-controls=\"8c44230e-b3cd-4db2-837c-fc24256fe674\">Select High-Impact Articles<\/button><\/span><div id=\"collapse8c44230e-b3cd-4db2-837c-fc24256fe674\" class=\"accordion-collapse collapse\" aria-labelledby=\"heading8c44230e-b3cd-4db2-837c-fc24256fe674\"><div class=\"accordion-body\"><div class=\"accordion-body-wrap\">\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[SPECTRUM&#8217;21]<\/strong><\/span> Roozbeh Tabrizian and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">The Hidden Authenticators: Nanometer-Scale Electromechanical Tags Could Thwart Counterfeiters<\/span>\u201d. <a href=\"https:\/\/spectrum.ieee.org\/\"><strong>IEEE Spectrum<\/strong><\/a>, June 2021.\u00a0<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9444937\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9444937\">PDF<\/a>]<\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[Nature MicroNano&#8217;20]<\/strong> <\/span>Sushant Rassay, Mehrdad Ramezani, <u>Sumaiya Shomaji<\/u>, <strong>Swarup Bhunia<\/strong>, and Roozbeh Tabrizian, &#8220;<span style=\"color: #000080\">Clandestine nanoelectromechanical tags for identification and authentication<\/span>&#8220;. <a href=\"https:\/\/www.nature.com\/micronano\/\"><strong>Nature Microsystems &amp; Nanoengineering<\/strong><\/a>, volume 6, Article number: 103 (2020).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/pubmed.ncbi.nlm.nih.gov\/34567712\/\">Abstract<\/a> | <a href=\"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-content\/uploads\/sites\/689\/2026\/02\/s41378-020-00213-2.pdf\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[SPECTRUM&#8217;19]<\/span> Swarup Bhunia <\/strong>and Soumyajit Mandal, \u201c<span style=\"color: #000080\">Detecting Fake Pills With Nuclear Quadrupole Resonance<\/span>\u201d. <a href=\"https:\/\/spectrum.ieee.org\/\"><strong>IEEE Spectrum<\/strong><\/a>, Aug 2019. <br \/><span style=\"color: #000080\">[<a href=\"https:\/\/spectrum.ieee.org\/detecting-fake-pills-with-nuclear-quadrupole-resonance\">Article<\/a>]<\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[PIEEE&#8217;18]<\/strong> <\/span>Sandip Ray, Mark M. Tehranipoor, Eric Peeters, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">System-on-Chip Platform Security Assurance: Architecture and Validation<\/span>\u201d. <a href=\"https:\/\/proceedingsoftheieee.ieee.org\/\"><strong>Proceedings of the IEEE (PIEEE)<\/strong><\/a>, in Special Issue on Secure Cyber Physical Systems, 106, no. 1, pp. 21-37, 2018.<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7987680\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?arnumber=7987680\">PDF<\/a>]<\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[SPECTRUM&#8217;17] <\/strong><\/span>Sandip Ray, <u>Abhishek Basak<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">To Secure the Internet of Things, We Must Build It Out of \u201cPatchable\u201d Hardware<\/span>\u201d. <a href=\"https:\/\/spectrum.ieee.org\/\"><strong>IEEE Spectrum<\/strong><\/a>, October 2017. <br \/><span style=\"color: #000080\">[<a href=\"https:\/\/spectrum.ieee.org\/to-secure-the-internet-of-things-we-must-build-it-out-of-patchable-hardware\">Article<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[SPECTRUM&#8217;17]<\/span>\u00a0 <\/strong>Mark Tehranipoor, Ujjwal Guin, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Invasion of the Hardware Snatchers: Cloned Electronics Pollute the Market<\/span>\u201d.\u00a0<a href=\"https:\/\/spectrum.ieee.org\/\"><strong>IEEE Spectrum<\/strong><\/a>, April 2017.<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/spectrum.ieee.org\/invasion-of-the-hardware-snatchers-cloned-electronics-pollute-the-market\">Article<\/a>]<\/span><\/li>\n<li><span style=\"color: #000080\"><u><strong>[<\/strong><\/u><strong>PIEEE&#8217;15] <\/strong><\/span><u>Robert Karam<\/u>, Ruchir Puri, Swaroop Ghosh, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Emerging Trends in Design and Applications of Memory based Computing and Content Addressable Memories<\/span>\u201d. <a href=\"https:\/\/proceedingsoftheieee.ieee.org\/\"><strong>Proceedings of the IEEE (PIEEE)<\/strong><\/a>, in Special Issue on Memories in the Future of Information Processing, vol. 103, no. 8, pp. 1311-1330, 2015.<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7159147\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?arnumber=7159147\">PDF<\/a>]<\/span><\/li>\n<li><span style=\"color: #000080\"><u><strong>[<\/strong><\/u><\/span><strong><span style=\"color: #000080\">PIEEE&#8217;14]<\/span> <\/strong><strong>Swarup Bhunia<\/strong>, Michael Hsiao, Mainak Banga, and <u>Seetharam Narasimhan<\/u>, \u201c<span style=\"color: #000080\">Hardware Trojan Attacks: Threat Analysis and Countermeasures<\/span>\u201d. <a href=\"https:\/\/proceedingsoftheieee.ieee.org\/\"><strong>Proceedings of the IEEE (PIEEE)<\/strong><\/a>, vol. 102, no. 8, pp. 1229-1247, 2014.<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6856140\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?arnumber=6856140\">PDF<\/a>]<\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[SCIENCE<\/strong><\/span><strong><span style=\"color: #000080\">&#8217;10]<\/span> <\/strong>Te-Hao Lee,<strong> Swarup Bhunia<\/strong>, and Mehran Mehregany, \u201c<span style=\"color: #000080\">Electromechanical Computing at 500 \u00b0C with Silicon Carbide<\/span>\u201d. <a href=\"https:\/\/www.science.org\/journal\/science\"><strong>Science<\/strong><\/a>, Sept 10, 2010, vol. 329, no. 5997, pp. 1316-1318.\u00a0<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/pubmed.ncbi.nlm.nih.gov\/20829479\/\">Abstract<\/a> | <a href=\"https:\/\/www.science.org\/doi\/10.1126\/science.1192511\">PDF<\/a>]<\/span><\/li>\n<\/ul>\n<\/div><div class=\"accordion-btn-wrap\"><\/div><\/div><\/div><\/div><\/div>\n\n\n\n<div class=\"wp-block-create-block-accordion-block-inner journal\"><div class=\"accordion-item\"><span class=\"accordion-header\" id=\"heading39827c52-d8a5-4c3d-a49f-3efbd00d265f\"><button class=\"accordion-button collapsed\" type=\"button\" data-bs-toggle=\"collapse\" data-bs-target=\"#collapse39827c52-d8a5-4c3d-a49f-3efbd00d265f\" aria-expanded=\"false\" aria-controls=\"39827c52-d8a5-4c3d-a49f-3efbd00d265f\">Journal Publications (Refereed)<\/button><\/span><div id=\"collapse39827c52-d8a5-4c3d-a49f-3efbd00d265f\" class=\"accordion-collapse collapse\" aria-labelledby=\"heading39827c52-d8a5-4c3d-a49f-3efbd00d265f\"><div class=\"accordion-body\"><div class=\"accordion-body-wrap\">\n<h4>2026<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[PV&#8217;26] <\/strong><\/span>Mustafa Mohammad Shaky, <span style=\"text-decoration: underline\">Rohan Reddy Kalavakonda<\/span>, Sumaiya Afroz Mila, Ankan Ghosh, Michael Futo, <span style=\"text-decoration: underline\">Jeremiah Hidayat<\/span>, <strong>Swarup Bhunia<\/strong>, Sandip Ray, and Bianca C. Burini, &#8220;<span style=\"font-size: 1.25rem;color: #000080\" data-olk-copy-source=\"MessageBody\">The Evolution of Mosquito Baiting: From Chemical and Electronic Methods towards AI<\/span><span style=\"font-size: 1.25rem\">\u201d, to appear in <\/span><a style=\"font-size: 1.25rem\" href=\"https:\/\/link.springer.com\/journal\/13071\">Parasites &amp; Vectors<\/a><span style=\"font-size: 1.25rem\"> (PV) (2026).<\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[TCASAI&#8217;26] <\/strong><\/span><span style=\"text-decoration: underline\">Habibur Rahaman<\/span>, <span style=\"text-decoration: underline\">Atri Chatterjee<\/span>, <strong>Swarup Bhunia<\/strong>, &#8220;<span style=\"color: #000080\">SAMURAI: Runtime Attack Detection in AI Accelerators Using AI Performance Counters<\/span>\u201d, to appear in <a href=\"https:\/\/ieee-cas.org\/publication\/ieee-transactions-circuits-and-systems-artificial-intelligence\">IEEE Transactions on Circuits and Systems for Artificial Intelligence<\/a> (TCASAI) (2026).<\/li>\n<li><span style=\"color: #000080\"><strong>[TECS&#8217;26] <\/strong><\/span>Kshitij Raj, <span style=\"text-decoration: underline\">Atri Chatterjee<\/span>, Patanjali SLPSK, <strong>Swarup Bhunia, <\/strong>and Sandip Ray, &#8220;<span style=\"color: #000080\">SENTRY: Protecting System-on-Chip Designs against Supply-Chain Attacks<\/span>\u201d, to appear in <a href=\"https:\/\/dl.acm.org\/journal\/tecs\">ACM Transactions on Embedded Computing Systems<\/a> (TECS) (2026).<\/li>\n<li><span style=\"color: #000080\"><strong>[TODAES&#8217;26] <\/strong><\/span><span data-olk-copy-source=\"MessageBody\">Tanvir Hossain, S M Mojahidul Ahsan<\/span>, Prabuddha Chakraborty, <strong>Swarup Bhunia, <\/strong>and Tamzidul Hoque, &#8220;<span style=\"color: #000080\" data-olk-copy-source=\"MessageBody\">Attacking the Protections of Hardware using Trojan-Assisted Meta Attacks<\/span>\u201d, to appear in <a href=\"https:\/\/dl.acm.org\/journal\/todaes\">ACM Transactions on Design Automation of Electronic Systems<\/a>\u00a0(TODAES) (2026).<\/li>\n<li><span style=\"color: #000080\"><strong>[TCAS-I&#8217;26] <\/strong><\/span><u>Peyman Dehghanzadeh<\/u>, Baibhab Chatterjee, Soumyajit Mandal, and <strong>Swarup Bhunia<\/strong>, &#8220;<span style=\"color: #000080\">DF-PUF: A Dual-Function Programmable Entropy Source for Secure Authentication and Memory Reuse in ASICs<\/span>\u201d, to appear in <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/mostRecentIssue.jsp?punumber=8919\">IEEE Transactions on Circuits and Systems I<\/a> (TCAS-I) (2026).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/11320889\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=11320889\">PDF<\/a>]<\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[TVLSI&#8217;26]<\/strong><\/span> <span style=\"text-decoration: underline\">Atri Chatterjee<\/span>, <span style=\"text-decoration: underline\">Habibur Rahaman<\/span>, and <strong>Swarup Bhunia,<\/strong> &#8220;<span class=\"title\"><span style=\"color: #000080\">ASTRA: Automated Insertion of Distributed Entropy Sources for Robust Authentication<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=92\">IEEE Trans. Very Large Scale Integr. Syst.<\/a> (TVLSI) 34(2): 634-647 (2026).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/www.computer.org\/csdl\/journal\/si\/2026\/02\/11223067\/2bgx87JDSwM\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=11223067\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TCAD&#8217;26]<\/span> <\/strong>Ovishake Sen, Chukwufumnanya Ogbogu, <span style=\"text-decoration: underline\">Peyman Deghanzadeh<\/span>, Janardhan Rao Doppa, <strong>Swarup Bhunia<\/strong>, Partha Pratim Pande, and Baibhab Chatterjee, \u201c<span style=\"color: #000080\">Look-Up Table based Energy-Efficient Architecture for Neural Accelerators (LANA)<\/span>\u201d, <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=43\">\u00a0IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems<\/a> (TCAD) 45(3): 1438-1452 (2026).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/11115133\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=11115133\">PDF<\/a>]<\/span><\/li>\n<li><u><strong><span style=\"color: #000080\">[SNCS&#8217;26]<\/span><\/strong><\/u> <u>Sudipta Paria<\/u> and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Harnessing the Power of LLMs for Enhancing Hardware Security<\/span>\u201d. <a href=\"https:\/\/link.springer.com\/journal\/42979\">SN Computer Science<\/a> (SNCS) 7, 218 (2026).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/article\/10.1007\/s42979-026-04799-8?utm_source=researchgate.net&amp;utm_medium=article#ethics\">Abstract<\/a> | <a href=\"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s42979-026-04799-8.pdf\">PDF<\/a>]<\/span><\/li>\n<li><u><strong><span style=\"color: #000080\">[SNCS&#8217;26]<\/span><\/strong><\/u> <u>Habibur Rahman<\/u>, <u>Atri Chatterjee<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Fortifying AI Systems: Emerging Threats and Security Countermeasures<\/span>\u201d. <a href=\"https:\/\/link.springer.com\/journal\/42979\">SN Computer Science<\/a> (SNCS) 7, 227 (2026).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/article\/10.1007\/s42979-025-04658-y\">Abstract<\/a> | <a href=\"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s42979-025-04658-y.pdf\">PDF<\/a>]<\/span><\/li>\n<\/ul>\n<h4>2025<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[D&amp;T&#8217;25] <\/strong><\/span><span style=\"text-decoration: underline\">Aritra Dasgupta<\/span>, <span style=\"text-decoration: underline\">Sudipta Paria<\/span>, Christopher Sozio, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">LATTE: Library Attack for Evaluating Hardware IP Protections Against Reverse Engineering<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/mostRecentIssue.jsp?punumber=6221038\">IEEE Des. Test\u00a0<\/a> (D&amp;T) 42(6): 127-137 (2025).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/11107412\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=11107412\">PDF<\/a>]<\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[IoTJ&#8217;25] <\/strong><\/span><span style=\"text-decoration: underline\">Rohan Reddy Kalavakonda<\/span>, <span style=\"text-decoration: underline\">Peyman Dehghanzadeh<\/span>, <span style=\"text-decoration: underline\">Junjun Huan<\/span>, Soumyajit Mandal, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Fusion Intelligence: A Paradigm for Merging Natural and Artificial Intelligence<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieee-iotj.org\/\">IEEE Internet Things J.<\/a> (IoTJ) 12(15): 30548-30563 (2025).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/11008686\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=11008686\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TCHES&#8217;25]<\/span> <\/strong><span style=\"text-decoration: underline\">Aritra Dasgupta<\/span>, <span style=\"text-decoration: underline\">Sudipta Paria<\/span> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">HIPR: Hardware IP Protection through Low-Overhead Fine-Grain Redaction<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/tches.iacr.org\/\">IACR Trans. Cryptogr. Hardw. Embed. Syst.<\/a> (TCHES) 2025(3): 781-805 (2025).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/eprint.iacr.org\/2025\/553\">Abstract<\/a> | <a href=\"https:\/\/eprint.iacr.org\/2025\/553.pdf\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TCAS-I&#8217;25]<\/span> <\/strong><span style=\"text-decoration: underline\">Peyman Deghanzadeh<\/span>, Soumyajit Mandal, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">MBM PUF: A Multi-Bit Memory-Based Physical Unclonable Function<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieee-cas.org\/publication\/TCAS-I\">IEEE Trans. Circuits Syst. I<\/a> (TCAS-I) 72(5): 2114-2127 (2025).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10836795\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10836795\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TC&#8217;25]<\/span> <\/strong><span style=\"text-decoration: underline\">Peyman Deghanzadeh<\/span>, Ovishake Sen, Baibhab Chatterjee, and <strong>Swarup Bhunia<\/strong>, &#8220;<span style=\"color: #000080\">LUNA-CiM: A Programmable Compute-in-Memory Fabric for Neural Network Acceleration<\/span>&#8220;. <a href=\"https:\/\/dl.acm.org\/journal\/itco\">IEEE Trans. Computers <\/a>(TC) 74(4): 1348-1361 (2025)<cite class=\"data tts-content\">.<\/cite><br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10827818\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10827818\">PDF<\/a>]<\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[TBioCAS&#8217;25] <\/strong><\/span><span style=\"text-decoration: underline\">Junjun Huan<\/span>, Vida Pashaei, Steve J. A. Majerus, <strong>Swarup Bhunia<\/strong>, and Soumyajit Mandal, &#8220;<span class=\"title\"><span style=\"color: #000080\">A Wearable Dual-Mode Probe for Image-Guided Closed-Loop Ultrasound Neuromodulation<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieee-cas.org\/publication\/TBioCAS\">IEEE Trans. Biomed. Circuits Syst.<\/a> (TBioCAS) 19(2): 357-373 (2025).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/pubmed.ncbi.nlm.nih.gov\/38990740\/\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?arnumber=10596042\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TIFS&#8217;25]<\/span> <\/strong>Tanzim Mahfuz, <strong>Swarup Bhunia<\/strong>, and Prabuddha Chakraborty, &#8220;<span class=\"title\"><span style=\"color: #000080\">X-DFS: Explainable Artificial Intelligence Guided Design-for-Security Solution Space Exploration<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/journal\/tifs\">IEEE Trans. Inf. Forensics Secur<\/a>. (TIFS) 20: 753-766 (2025).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10798618\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10798618\">PDF<\/a>]<\/span><\/li>\n<\/ul>\n<h4>2024<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong><span style=\"color: #000080\">[TAI&#8217;24] <\/span><\/strong><span style=\"text-decoration: underline\">Prabuddha Chakraborty<\/span> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">A Self-Aware Digital Memory Framework Powered by Artificial Intelligence<\/span>&#8220;.<\/span> <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=9078688\">IEEE Trans. Artif.\u00a0Intell.<\/a> (TAI) 5(7): 3579-3594 (2024).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10466638\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10466638\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TODAES&#8217;24] <\/span><\/strong><span style=\"text-decoration: underline\">Moshiur Rahman<\/span>, Jim Geist, Daniel Xing, Yuntao Liu, Ankur Srivastava, Travis Meade, Yier Jin, and <strong>Swarup Bhunia<\/strong>,\u00a0&#8220;<span class=\"title\"><span style=\"color: #000080\">Security Evaluation of State Space Obfuscation of Hardware IP through a Red Team-Blue Team Practice<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/journal\/todaes\">ACM Trans. Design Autom. Electr. Syst.<\/a> (TODAES) 29(3): 50:1-50:18 (2024).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/3640461\">Abstract<\/a> | <a href=\"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3640461\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TCAD&#8217;24] <\/span><\/strong><span style=\"text-decoration: underline\">Shubhra Deb Paul<\/span>, <span style=\"text-decoration: underline\">Aritra Dasgupta<\/span>, <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">FDPUF: Frequency-Domain PUF for Robust Authentication of Edge Devices<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=43\">IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.<\/a> (TCAD) 43(11): 3479-3490 (2024).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10745826\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10745826\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[ESL&#8217;24] <\/span><\/strong><span style=\"text-decoration: underline\">Sudipta Paria<\/span>, <span style=\"text-decoration: underline\">Aritra Dasgupta<\/span>, and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">SPELL: An End-to-End Tool Flow for LLM-Guided Secure SoC Design for Embedded Systems<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/tocresult.jsp?isnumber=9179054&amp;punumber=4563995\">IEEE Embed. Syst. Lett.<\/a> (ESL) 16(4): 365-368 (2024).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10779517\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10779517\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[D&amp;T&#8217;24] <\/span><\/strong><span style=\"text-decoration: underline\">Prabuddha Chakraborty<\/span>, <span style=\"text-decoration: underline\">Jonathan Cruz<\/span>, <span style=\"text-decoration: underline\">Rasheed Almawzan<\/span>, Tanzim Mahfuz, and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">Learning Your Lock: Exploiting Structural Vulnerabilities in Logic Locking<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/mostRecentIssue.jsp?punumber=6221038\">IEEE Des. Test<\/a> (D&amp;T) 41(2): 7-14 (2024).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10400498\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10400498\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[CEM&#8217;24] <\/span><\/strong><span style=\"text-decoration: underline\">Reiner N. Dizon-Paradis<\/span>, <span style=\"text-decoration: underline\">Rohan Reddy Kalavakonda<\/span>, <span style=\"text-decoration: underline\">Prabuddha Chakraborty<\/span>, and <strong>Swarup Bhunia<\/strong>: &#8220;<span style=\"color: #000080\">Pasteables: A Flexible and Smart \u201cStick-and-Peel\u201d Wearable Platform for Fitness and Athletics<\/span><span class=\"title\">&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=5962380\">IEEE Consumer Electronics Magazine<\/a> (CEM) 13(6): 539-543 (2024).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9732226\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?arnumber=9732226\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[ACCESS&#8217;24] <\/span><\/strong>Kelsey L. Horace-Herron,<span style=\"text-decoration: underline\"> Naren Vikram Raj Masna<\/span>, <strong>Swarup Bhunia<\/strong>, Soumyajit Mandal, and Sandip Ray: &#8220;<span class=\"title\"><span style=\"color: #000080\">Nuclear Quadrupole Resonance for Substance Detection<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=6287639\">IEEE Access<\/a> (ACCESS) 12: 111709-111722 (2024).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10623459\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10623459\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[ACCESS&#8217;24] <\/span><\/strong><span style=\"text-decoration: underline\">Junjun Huan<\/span>, <span style=\"text-decoration: underline\">Shubhra Deb Paul<\/span>, Soumyajit Mandal, and <strong>Swarup Bhunia<\/strong>: &#8220;<span class=\"title\"><span style=\"color: #000080\">PRISTINE: An Emulation Platform for PCB-Level Hardware Trojans<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=6287639\">IEEE Access<\/a> (ACCESS) 12: 49291-49305 (2024).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10487955\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10487955\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[D&amp;T&#8217;24] <\/span><\/strong>Anupam Chattopadhyay, Shivam Bhasin, Tim G\u00fcneysu, and <strong>Swarup Bhunia<\/strong>: &#8220;<span class=\"title\"><span style=\"color: #000080\">Quantum-Safe Internet of Things<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/mostRecentIssue.jsp?punumber=6221038\">IEEE Des. Test<\/a> (D&amp;T) 41(5): 36-45 (2024).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10559599\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10559599\">PDF<\/a>]<\/span><\/li>\n<\/ul>\n<ul style=\"list-style-type: circle\">\n<li><strong><span style=\"color: #000080\">[TC&#8217;24] <\/span><\/strong>Rajat Sadhukhan, Sayandeep Saha, <span style=\"text-decoration: underline\">Sudipta Paria<\/span>, <strong>Swarup Bhunia<\/strong>, and Debdeep Mukhopadhyay, \u201c<span class=\"title\"><span style=\"color: #000080\">VALIANT: An EDA Flow for Side-Channel Leakage Evaluation and Tailored Protection<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/journal\/itco\">IEEE Trans. Computers<\/a> (TC) 73(2): 436-450 (2024). <strong><span style=\"color: #ff6600\">[<span class=\"markz0q2ye5ga\" data-markjs=\"true\" data-ogac=\"\" data-ogab=\"\" data-ogsc=\"\" data-ogsb=\"\">Top<\/span> <span class=\"markcliie518c\" data-markjs=\"true\" data-ogac=\"\" data-ogab=\"\" data-ogsc=\"\" data-ogsb=\"\">Picks<\/span> in Hardware and Embedded Security (HES) 2025]<br \/><\/span><\/strong><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10325657\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10325657\">PDF<\/a>]<\/span><\/span><strong><span style=\"color: #ff6600\"><br \/><\/span><\/strong><\/li>\n<li><strong><span style=\"color: #000080\">[TVLSI&#8217;24] <\/span><\/strong><span style=\"text-decoration: underline\">Moshiur Rahman<\/span> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Practical Implementation of Robust State-Space Obfuscation for Hardware IP Protection<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=92\">IEEE Trans. Very Large Scale Integr. Syst.<\/a> (TVLSI) 32(2): 333-346 (2024).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10258414\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10258414\">PDF<\/a>]<\/span><\/span><strong><span style=\"color: #ff6600\"><br \/><\/span><\/strong><\/li>\n<li><strong><span style=\"color: #000080\">[TVLSI&#8217;24] <\/span><\/strong><span style=\"text-decoration: underline\">Christopher Vega<\/span>, Patanjali SLPSK, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">IOLock: An Input\/Output Locking Scheme for Protection Against Reverse Engineering Attacks<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=92\">IEEE Trans. Very Large Scale Integr. Syst.<\/a> (TVLSI) 32(2): 347-360 (2024).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10354011\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10354011\">PDF<\/a>]<\/span><\/span><strong><span style=\"color: #ff6600\"><br \/><\/span><\/strong><\/li>\n<\/ul>\n<h4>2023<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong><span style=\"color: #000080\">[TC&#8217;23] <\/span><\/strong>Patanjali SLPSK, Sandip Ray, and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">TREEHOUSE: A Secure Asset Management Infrastructure for Protecting 3DIC Designs<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/journal\/itco\">IEEE Trans. Computers<\/a> (TC) 72(8): 2306-2320 (2023).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10050826\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10050826\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[JRTE&#8217;23] <\/span><\/strong>Christine Wusylko, Zhen Xu, Kara M Dawson, Pavlo D Antonenko, Do Hyong Koh, Minyoung Lee, Amber E Benedict, and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">Using a comic book to engage students in a cryptology and a cybersecurity curriculum<\/span>&#8220;.\u00a0<a href=\"https:\/\/www.tandfonline.com\/toc\/ujrt20\/current\">Journal of Research on Technology in Education<\/a> (JRTE), 2023.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/www.tandfonline.com\/doi\/full\/10.1080\/15391523.2022.2150726#abstract\">Abstract<\/a> | <a href=\"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-content\/uploads\/sites\/689\/2026\/02\/Using-a-comic-book-to-engage-students-in-a-cryptology-and-cybersecurity-curriculum_compressed.pdf\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[SREP&#8217;23] <\/span><\/strong>Kelsey Horace-Herron, <span style=\"text-decoration: underline\">Naren Vikram Raj Masna<\/span>, <span style=\"text-decoration: underline\">Peyman Dehghanzadeh<\/span>, Soumyajit Mandal, and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">Non-invasive authentication of mail packages using nuclear quadrupole resonance spectroscopy<\/span>&#8220;. <a href=\"https:\/\/www.nature.com\/srep\/\">Nature Scientific Reports<\/a> (SREP) (2023).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/www.nature.com\/articles\/s41598-023-31497-9\">Abstract<\/a> | <a href=\"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-content\/uploads\/sites\/689\/2026\/02\/s41598-023-31497-9.pdf\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TC&#8217;23] <\/span><\/strong><span style=\"text-decoration: underline\">Shubhra Deb Paul<\/span> and\u00a0<strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">CurIAs: Current-Based IC Authentication by Exploiting Supply Current Variations<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/journal\/itco\">IEEE Trans. Computers<\/a> (TC) 72(2): 466-479 (2023).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9732208\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9732208\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TCAD&#8217;23] <\/span><\/strong><span style=\"text-decoration: underline\">Aritra Bhattacharyay<\/span>, <span style=\"text-decoration: underline\">Shuo Yang<\/span>, <span style=\"text-decoration: underline\">Jonathan Cruz<\/span>, <span style=\"text-decoration: underline\">Prabuddha Chakraborty<\/span>, <strong>Swarup Bhunia<\/strong>, and Tamzidul Hoque, &#8220;<span class=\"title\"><span style=\"color: #000080\">An Automated Framework for Board-Level Trojan Benchmarking<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=43\">IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.<\/a> (TCAD) 42(2): 397-410 (2023).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9785666\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9785666\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2022<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong><span style=\"color: #000080\">[TC&#8217;22] <\/span><\/strong>Patanjali SLPSK, <span style=\"text-decoration: underline\">Abhishek Anil Nair<\/span>, Chester Rebeiro, and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">SIGNED: A Challenge-Response Based Interrogation Scheme for Simultaneous Watermarking and Trojan Detection<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/journal\/itco\">IEEE Trans. Computers<\/a> (TC) 72(6): 1763-1777 (2022).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9954907\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9954907\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[ACCESS&#8217;22] <\/span><\/strong><span style=\"text-decoration: underline\">Junjun Huan<\/span>, Nicholas Olexa, Brett Hochman, <strong>Swarup Bhunia<\/strong>, Rashmi Jha, and Soumyajit Mandal, &#8220;<span class=\"title\"><span style=\"color: #000080\">Intrinsically Secure Non-Volatile Memory Using ReRAM Devices<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=6287639\">IEEE Access<\/a> (ACCESS) 10: 104577-104588 (2022).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/abstract\/document\/9900346\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/ielaam\/6287639\/9668973\/9900346-aam.pdf\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[ESL&#8217;22] <\/span><\/strong><span style=\"text-decoration: underline\">Prabuddha Chakraborty<\/span>, <span style=\"text-decoration: underline\">Jonathan Cruz<\/span>, <span style=\"text-decoration: underline\">Christopher Posada<\/span>, Sandip Ray, and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">HASTE: Software Security Analysis for Timing Attacks on Clear Hardware Assumption<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/tocresult.jsp?isnumber=9179054&amp;punumber=4563995\">IEEE Embed. Syst. Lett.<\/a> (ESL) 14(2): 71-74 (2022).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9606205\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9606205\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[ESL&#8217;22] <\/span><\/strong><span style=\"text-decoration: underline\">Prabuddha Chakraborty<\/span>, <span style=\"text-decoration: underline\">Reiner N. Dizon-Paradis<\/span>, and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">ARTS: A Framework for AI-Rooted IoT System Design Automation<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/tocresult.jsp?isnumber=9179054&amp;punumber=4563995\">IEEE Embed. Syst. Lett.<\/a> (ESL) 14(3): 151-154 (2022).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9732465\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9732465\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[IoTJ&#8217;22] <\/span><\/strong><span style=\"text-decoration: underline\">Shubhra Deb Paul<\/span>, <span style=\"text-decoration: underline\">Fengchao Zhang<\/span>, Patanjali SLPSK, Amit Ranjan Trivedi, and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">RIHANN: Remote IoT Hardware Authentication With Intrinsic Identifiers<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieee-iotj.org\/\">IEEE Internet Things J.<\/a> (IoTJ) 9(24): 24615-24627 (2022).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9847220\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9847220\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[NCAA&#8217;22] <\/span><\/strong><span style=\"text-decoration: underline\">Prabuddha Chakraborty<\/span> and\u00a0<strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">BINGO: brain-inspired learning memory<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dblp.org\/db\/journals\/nca\/nca34.html#journals\/nca\/ChakrabortyB22\">Neural Comput. Appl.<\/a> (NCAA) 34(4): 3223-3247 (2022).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/article\/10.1007\/s00521-021-06484-8\">Abstract<\/a> | <a href=\"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-content\/uploads\/sites\/689\/2026\/02\/s00521-021-06484-8.pdf\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TCAD&#8217;22] <\/span><\/strong><span style=\"text-decoration: underline\">Abdulrahman Alaql<\/span>, <span style=\"text-decoration: underline\">Saranyu Chattopadhyay<\/span>, <span style=\"text-decoration: underline\">Prabuddha Chakraborty<\/span>, Tamzidul Hoque, and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">LeGO: A Learning-Guided Obfuscation Framework for Hardware IP Protection<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=43\">IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.<\/a> (TCAD) 41(4): 854-867 (2022).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9416561\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9416561\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TVLSI&#8217;22] <\/span><\/strong><span style=\"text-decoration: underline\">Shuo Yang<\/span>, <span style=\"text-decoration: underline\">Tamzidul Hoque<\/span>, <span style=\"text-decoration: underline\">Prabuddha Chakraborty<\/span>, and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">Golden-Free Hardware Trojan Detection Using Self-Referencing<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=92\">IEEE Trans. Very Large Scale Integr. Syst.<\/a> (TVLSI) 30(3): 325-338 (2022).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9684502\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9684502\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TVLSI&#8217;22] <\/span><\/strong><span style=\"text-decoration: underline\">Atul Prasad Deb Nath<\/span>, Kshitij Raj, <strong>Swarup Bhunia<\/strong>, and Sandip Ray, &#8220;<span class=\"title\"><span style=\"color: #000080\">SoCCom: Automated Synthesis of System-on-Chip Architectures<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=92\">IEEE Trans. Very Large Scale Integr. Syst.<\/a> (TVLSI) 30(4): 449-462 (2022).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9714864\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9714864\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TVLSI&#8217;22] <\/span><\/strong>Mahmudul Hasan, <span style=\"text-decoration: underline\">Jonathan Cruz<\/span>, Prabuddha Chakraborty, <strong>Swarup Bhunia<\/strong>, and Tamzidul Hoque, &#8220;<span style=\"color: #000080\">Trojan Resilient Computing in COTS Processors Under Zero Trust<\/span>&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/mostRecentIssue.jsp?punumber=92\">IEEE Trans. Very Large Scale Integr. Syst.<\/a> (TVLSI) 30(10): 1412-1424 (2022).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9859256\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9859256\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2021<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong><span style=\"color: #000080\">[ASEE&#8217;21] <\/span><\/strong><span style=\"text-decoration: underline\">Shuo Yang<\/span>, <span style=\"text-decoration: underline\">Subhra Deb Paul<\/span>, and <b>Swarup Bhunia<\/b>, &#8220;<span style=\"color: #000080\">Hands-on Learning of Hardware and Systems Security<\/span>&#8220;. <a href=\"https:\/\/www.asee.org\/\">Advances in Engineering Education<\/a> (ASEE) Vol. 9, No. 2, (2021).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/eric.ed.gov\/?id=EJ1309224\">Abstract<\/a> | <a href=\"https:\/\/files.eric.ed.gov\/fulltext\/EJ1309224.pdf\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[CEM&#8217;21] <\/span><\/strong><span style=\"text-decoration: underline\">Rohan Reddy Kalavakonda<\/span>, <span style=\"text-decoration: underline\">Naren Vikram Raj Masna<\/span>, Anamika Bhuniaroy, Soumyajit Mandal, and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">A Smart Mask for Active Defense Against Coronaviruses and Other Airborne Pathogens<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/www.ieee.org\/membership-catalog\/productdetail\/showProductDetailPage.html?product=PER262-EPC\">IEEE Consumer Electron. Mag.<\/a> (CEM) 10(2): 72-79 (2021).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9237089\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9237089\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[IoTJ&#8217;21] <\/span><\/strong><span style=\"text-decoration: underline\">Prabuddha Chakraborty<\/span>, <span style=\"text-decoration: underline\">Jonathan Cruz<\/span>, and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">MAGIC: Machine-Learning-Guided Image Compression for Vision Applications in Internet of Things<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieee-iotj.org\/\">IEEE Internet Things J.<\/a> (IoTJ) 8(9): 7303-7315 (2021).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9272623\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9272623\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[JETC&#8217;21] <\/span><\/strong><span style=\"text-decoration: underline\">Shubhra Deb Paul<\/span> and\u00a0<strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">SILVerIn: Systematic Integrity Verification of Printed Circuit Board Using JTAG Infrastructure<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/journal\/jetc\">ACM J. Emerg. Technol. Comput. Syst.<\/a> (JETC) 17(3): 44:1-44:28 (2021).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/3460232\">Abstract<\/a> | <a href=\"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3460232\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TCAD&#8217;21] <\/span><\/strong>Wei Hu, Chip-Hong Chang, Anirban Sengupta, <strong>Swarup Bhunia<\/strong>, Ryan Kastner, Hai Li, &#8220;<span class=\"title\"><span style=\"color: #000080\">An Overview of Hardware Security and Trust: Threats, Countermeasures, and Design Tools<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=43\">IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.<\/a> (TCAD) 40(6): 1010-1038 (2021). <span style=\"color: #ff6600\"><strong>[Second most cited article, Feb 24, 2026]<\/strong><\/span><br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9310331\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9310331\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TIFS&#8217;21] <\/span><\/strong><span style=\"text-decoration: underline\">Abdulrahman Alaql<\/span> and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">SARO: Scalable Attack-Resistant Logic Locking<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/journal\/tifs\">IEEE Trans. Inf. Forensics Secur.<\/a> (TIFS) 16: 3724-3739 (2021).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9465802\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9465802\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TIFS&#8217;21] <\/span><\/strong><span style=\"text-decoration: underline\">Prabuddha Chakraborty<\/span>, <span style=\"text-decoration: underline\">Jonathan Cruz<\/span>, <span style=\"text-decoration: underline\">Abdulrahman Alaql<\/span>, and <strong>Swarup Bhunia<\/strong>: &#8220;<span class=\"title\"><span style=\"color: #000080\">SAIL: Analyzing Structural Artifacts of Logic Locking Using Machine Learning<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/journal\/tifs\">IEEE Trans. Inf. Forensics Secur.<\/a> (TIFS) 16: 3828-3842 (2021).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9478898\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9478898\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TODAES&#8217;21] <\/span><\/strong>Indrani Roy, Chester Rebeiro, Aritra Hazra, and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">FaultDroid: An Algorithmic Approach for Fault-Induced Information Leakage Analysis<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/journal\/todaes\">ACM Trans. Design Autom. Electr. Syst.<\/a> (TODAES) 26(1): 2:1-2:27 (2021).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/3410336\">Abstract<\/a> | <a href=\"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3410336\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TVLSI&#8217;21] <\/span><\/strong><span style=\"text-decoration: underline\">Fengchao Zhang<\/span>, <span style=\"text-decoration: underline\">Shubhra Deb Paul<\/span>, Patanjali SLPSK, Amit Ranjan Trivedi, and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">On Database-Free Authentication of Microelectronic Components<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=92\">IEEE Trans. Very Large Scale Integr. Syst.<\/a> (TVLSI) 29(1): 149-161 (2021).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9284445\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9284445\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TVLSI&#8217;21] <\/span><\/strong><span style=\"text-decoration: underline\">Abdulrahman Alaql<\/span>, <span style=\"text-decoration: underline\">Md Moshiur Rahman<\/span>, and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">SCOPE: Synthesis-Based Constant Propagation Attack on Logic Locking<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=92\">IEEE Trans. Very Large Scale Integr. Syst.<\/a> (TVLSI) 29(8): 1529-1542 (2021).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9466931\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9466931\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TCHES&#8217;21] <\/span><\/strong>Keerthi K, Indrani Roy, Chester Rebeiro, Aritra Hazra, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">FEDS: Comprehensive Fault Attack Exploitability Detection for Software Implementations of Block Ciphers<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/tches.iacr.org\/\">IACR Trans. Cryptogr. Hardw. Embed. Syst.<\/a> (TCHES) 2020(2): 272-299 (2020).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/tches.iacr.org\/index.php\/TCHES\/article\/view\/8552\">Abstract<\/a> | <a href=\"https:\/\/tches.iacr.org\/index.php\/TCHES\/article\/view\/8552\/8117\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2020<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong><span style=\"color: #000080\">[CEM&#8217;20] <\/span><\/strong><span style=\"text-decoration: underline\">Tamzidul Hoque<\/span>, Patanjali SLPSK, and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">Trust Issues in Microelectronics: The Concerns and the Countermeasures<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/www.ieee.org\/membership-catalog\/productdetail\/showProductDetailPage.html?product=PER262-EPC\">IEEE Consumer Electron. Mag.<\/a> (CEM) 9(6): 72-83 (2020).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9090969\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9090969\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[SPECTRUM&#8217;20] <\/span><\/strong>Roozbeh Tabrizian and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">The Hidden Authenticators<\/span>\u201d. <a href=\"https:\/\/innovate.ieee.org\/ieee-spectrum-june-2020\/\">IEEE Spectrum<\/a>, (SPECTRUM) (2020).<\/li>\n<li><strong><span style=\"color: #000080\">[Nature MicroNano&#8217;20] <\/span><\/strong>Sushant Rassay, Mehrdad Ramezani, <span style=\"text-decoration: underline\">Sumaiya Shomaji<\/span>, <strong>Swarup Bhunia<\/strong>, and Roozbeh Tabrizian, &#8220;<span style=\"color: #000080\">Clandestine nanoelectromechanical tags for identification and authentication<\/span>&#8220;. <a href=\"https:\/\/www.nature.com\/micronano\/\">Nature Microsystems &amp; Nanoengineering<\/a> (NATURE MicroNano) volume 6, Article number: 103 (2020).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/www.nature.com\/articles\/s41378-020-00213-2\">Abstract<\/a> | <a href=\"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-content\/uploads\/sites\/689\/2026\/02\/s41378-020-00213-2.pdf\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[D&amp;T&#8217;20] <\/span><\/strong><span style=\"text-decoration: underline\">Tamzidul Hoque<\/span>, Rajat Subhra Chakraborty, <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">Hardware Obfuscation and Logic Locking: A Tutorial Introduction<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/mostRecentIssue.jsp?punumber=6221038\">IEEE Des. Test<\/a> (D&amp;T) 37(3): 59-77 (2020).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9050810\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9050810\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TCAD&#8217;20] <\/span><\/strong>Indrani Roy, Chester Rebeiro, Aritra Hazra, <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">SAFARI: Automatic Synthesis of Fault-Attack Resistant Block Cipher Implementations<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=43\">IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.<\/a> (TCAD) 39(4): 752-765 (2020).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8634921\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=8634921\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TIFS&#8217;20] <\/span><\/strong>Atul Prasad Debnath, Srivalli Boddupalli, <strong>Swarup Bhunia<\/strong>, and Sandip Ray, \u201c<span class=\"title\"><span style=\"color: #000080\">Resilient System-on-Chip Designs With NoC Fabrics<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/journal\/tifs\">IEEE Trans. Inf. Forensics Secur.<\/a> (TIFS) 15: 2808-2823 (2020).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9019608\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9019608\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[JMR&#8217;20] <\/span><\/strong>Cheng Chen, Xinyao Tang, Naren V.R. Masna, <strong>Swarup Bhunia<\/strong>, and Soumyajit Mandal, \u201c<span style=\"color: #000080\">Single-Shot Spatially-Localized NQR using Field-Dependent Relaxation Rates<\/span>\u201d. <a href=\"https:\/\/www.sciencedirect.com\/journal\/journal-of-magnetic-resonance\">Journal of Magnetic Resonance<\/a> (JMR), vol. 311 (2020).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/pubmed.ncbi.nlm.nih.gov\/31865184\/\">Abstract<\/a> | <a href=\"https:\/\/pdf.sciencedirectassets.com\/272577\/1-s2.0-S1090780719X00130\/1-s2.0-S109078071930299X\/main.pdf?X-Amz-Security-Token=IQoJb3JpZ2luX2VjEMz%2F%2F%2F%2F%2F%2F%2F%2F%2F%2FwEaCXVzLWVhc3QtMSJHMEUCICi4GIoWCckHkMDL0b5hXgJiH5Jnl0ca%2FvnDbXDURRY5AiEA3D1M1Hl22CemeUppcKFeTIhHiHnzLl%2Bq1vW9vJOqYbEqvAUIlP%2F%2F%2F%2F%2F%2F%2F%2F%2F%2FARAFGgwwNTkwMDM1NDY4NjUiDE1cixwOLOjCxYZQWyqQBeBlhfDxVC6t%2F6W%2FJLF8YmElSDmzmAHaosN9620pEgRZfUzUFOJBOgis6k4%2BWWae3KZu%2B4S6hIcGqA9KTt%2FYnyx7Df%2FMtXl7SxWnXyzZcg5mNEriml7iqpRjHvdmP%2BSOA4okyQntzgP9Pr6bpxZhu9WhK1DUAZTyF0VcGJCQUzHjTsfr8sk5VjiMUmVYyruu5Bp1WSRbpZav64Nfm0sGrQcUiRSgOfXZIOzY5GbLVd7CkonRyUJq%2BcdKHHEmuMaK666BylhOkJYH4v6VC8iDpIl7PKkZ5QlKABq6N%2FeW916Mq6T25CVd4Q9u2CySarQ3U3kSxsa2p46Y7as3xcu0GlfTcXvPG%2BiYwae0cpw6SJhDTMILwudALByaGbd1o0y8zxysS4hAZhmgQidin1EEBWFwZXh6VyjK63Lb6sdQ%2FADbDP6J6Pv1u667tq4E1sY%2BIaMh%2B9X0KaI1d2Hopc4pa4AhfWwglseq%2B8hcmlt3qTWBKx5paar6yipbYo2ae925SRKzAEcSR0qfdzd%2BN9vxwYVvAW5zs4Lc1ZWOO9g%2FUCxYqOISd4Ea3ZmQLYWhIDVgbAMgWr5iO7oUsOrJUyLNLvsKVYfhEfM0kOUaDCDKGDhK4iGqtCLdN3dA8gu3A%2FnfALfGFzql5qggBjnoA6RjlxG89mXhFdYbCyyEFAh4Nj1TZzGBSBC%2BynsMNTYjDPoC8o9DBbdzxFjGAIQ3r%2BCyjA%2Fc0Pd6IekzqDD0vWt8vp2ANTpXjVY1K0C2YbwSapof6WjourKjhSXD4Zt5yFXGK49gXsKMXr6No5hfKnuUqMgIcvJcAxhP7PEeylbtpiPCK51DKcsHvL%2FzyzX0fOjhiwnQP2TPH5%2BaQsrrIhvDUa9xMOnkqMwGOrEBtTawOpqVUYlkcJgBCUQdi1QVTDVoyesw61r1aoG7fR%2BmzdgM%2FHaYZYzX%2BRvE9n6WW07E4DGjSlKGqwUGF0wQ0TAmfC2kPKV%2B41AhESsGuZu4YwkKgeg9tPhxSxDI4YAgMLLGgUxbBFgnOfXlew778r5g0HgOKZELktWK0LDrqSkPaagcTppNxHPzXORvggnhfph%2B3xQUCKS0UJ3GcTmVaYzjwmwlz6IYSPHrEfsn4d1J&amp;X-Amz-Algorithm=AWS4-HMAC-SHA256&amp;X-Amz-Date=20260209T201229Z&amp;X-Amz-SignedHeaders=host&amp;X-Amz-Expires=300&amp;X-Amz-Credential=ASIAQ3PHCVTYYJVGMENX%2F20260209%2Fus-east-1%2Fs3%2Faws4_request&amp;X-Amz-Signature=f50013fdebc46a7219a4eb46a10be4d5a0b4eed86815f0cfb39bdb0fe27802fc&amp;hash=21ffd992dafaf4592daea1e9a4acee74ab0d108dbf0c074b555f9a0eed562299&amp;host=68042c943591013ac2b2430a89b270f6af2c76d8dfd086a07176afe7c76c2c61&amp;pii=S109078071930299X&amp;tid=spdf-def518c5-8c76-426d-857f-4dc776aa9a54&amp;sid=c4cb4cd1181958477c9a07d89caf471de026gxrqa&amp;type=client&amp;tsoh=d3d3LnNjaWVuY2VkaXJlY3QuY29t&amp;rh=d3d3LnNjaWVuY2VkaXJlY3QuY29t&amp;ua=111457050055515b5a&amp;rr=9cb6059a5dbecf39&amp;cc=us\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TVLSI&#8217;20] <\/span><\/strong>Ahish Shylendra, Priyesh Shukla, Saibal Mukhopadhyay, <strong>Swarup Bhunia<\/strong>, and Amit Ranjan Trivedi, \u201c<span class=\"title\"><span style=\"color: #000080\">Low Power Unsupervised Anomaly Detection by Nonparametric Modeling of Sensor Statistics<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=92\">IEEE Trans. Very Large Scale Integr. Syst.<\/a> (TVLSI) 28(8): 1833-1843 (2020).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9068488\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9068488\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2019<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong><span style=\"color: #000080\">[TODAES&#8217;19] <\/span><\/strong><span style=\"text-decoration: underline\">Tamzidul Hoque<\/span>, <span style=\"text-decoration: underline\">Kai Yang<\/span>, <span style=\"text-decoration: underline\">Robert Karam<\/span>, Shahin Tajik, Domenic Forte, Mark Tehranipoor, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Hidden in Plaintext: An Obfuscation-based Countermeasure against FPGA Bitstream Tampering Attacks<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/journal\/todaes\">ACM Trans. Design Autom. Electr. Syst.<\/a> (TODAES) 25(1): 4:1-4:32 (2020).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/abs\/10.1145\/3361147\">Abstract<\/a> | <a href=\"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3361147\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[SPECTRUM&#8217;19]\u00a0 <\/span>Swarup Bhunia<\/strong> and Soumyajit Mandal, \u201c<span style=\"color: #000080\">Fighting Fake Medicine using Nuclear Quadrupole Spectroscopy<\/span>\u201d. <a href=\"https:\/\/innovate.ieee.org\/ieee-spectrum-november-2019\/\">IEEE Spectrum<\/a>\u00a0(SPECTURM) Nov 2019.<\/li>\n<li><strong><span style=\"color: #000080\">[TVLSI&#8217;19] <\/span><\/strong>Ahish Shylendra, <strong>Swarup Bhunia<\/strong>, and Amit Ranjan Trivedi, \u201c<span class=\"title\"><span style=\"color: #000080\">An Intrinsic and Database-Free Authentication by Exploiting Process Variation in Back-End Capacitors<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=92\">IEEE Trans. Very Large Scale Integr. Syst.<\/a> (TVLSI) 27(6): 1253-1261 (2019).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8681615\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=8681615\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[ACCESS&#8217;19] <\/span><\/strong><span style=\"text-decoration: underline\">Naren Vikram Raj Masna<\/span>, Cheng Chen, Soumyajit Mandal, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Robust Authentication of Consumables With Extrinsic Tags and Chemical Fingerprinting<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=6287639\">IEEE Access<\/a> (ACCESS) 7: 14396-14409 (2019).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8618411\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=8618411\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[CEM&#8217;19] <\/span><\/strong><span style=\"text-decoration: underline\">Sumaiya Shomaji<\/span>, Parisa Dehghanzadeh, Alex Roman, Domenic Forte, <strong>Swarup Bhunia<\/strong>, and Soumyajit Mandal, \u201c<span class=\"title\"><span style=\"color: #000080\">Early Detection of Cardiovascular Diseases Using Wearable Ultrasound Device<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/www.ieee.org\/membership-catalog\/productdetail\/showProductDetailPage.html?product=PER262-EPC\">IEEE Consumer Electron. Mag.<\/a> (CEM) 8(6): 12-21 (2019).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8889541\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=8889541\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2018<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong><span style=\"color: #000080\">[IJFST&#8217;18] <\/span><\/strong><span style=\"text-decoration: underline\">Naren Vikram Raj Masna<\/span>, Cheng Chen, Soumyajit Mandal, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Authentication of Dietary Supplements through Nuclear Quadrupole Resonance (NQR) Spectroscopy<\/span>\u201d. <a href=\"https:\/\/ifst.onlinelibrary.wiley.com\/journal\/13652621\">International Journal of Food Science and Technology<\/a> (IJFST), 2018.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ifst.onlinelibrary.wiley.com\/doi\/10.1111\/ijfs.13892\">Abstract<\/a> | <a href=\"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-content\/uploads\/sites\/689\/2026\/02\/Int-J-of-Food-Sci-Tech-2018-Masna-Authentication-of-dietary-supplements-through-Nuclear-Quadrupole-Resonance-NQR-.pdf\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[CEM&#8217;18] <\/span><\/strong><span style=\"text-decoration: underline\">Naren Vikram Raj Masn<\/span>a, <span style=\"text-decoration: underline\">Shubhra Deb Paul<\/span>, Cheng Chen, Soumyajit Mandal, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Eat, but Verify: Low-Cost Portable Devices for Food Safety Analysis<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/www.ieee.org\/membership-catalog\/productdetail\/showProductDetailPage.html?product=PER262-EPC\">IEEE Consumer Electron. Mag.<\/a> (CEM) 8(1): 12-18 (2019). <span style=\"color: #ff6600\"><strong>[Featured Cover Story] [Best Paper Award]<br \/><\/strong><\/span><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8570909\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=8570909\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TIFS&#8217;18] <\/span><\/strong>Yuanwen Huang, <strong>Swarup Bhunia<\/strong>, and Prabhat Mishra, \u201c<span class=\"title\"><span style=\"color: #000080\">Scalable Test Generation for Trojan Detection Using Side Channel Analysis<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/journal\/tifs\">IEEE Trans. Inf. Forensics Secur.<\/a> (TIFS) 13(11): 2746-2760 (2018).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8353873\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=8353873\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[HASS&#8217;18] <\/span><\/strong>Sarah Amir, Bicky Shakya, Xiaolin Xu, Yier Jin, <strong>Swarup Bhunia<\/strong>, Mark Tehranipoor, and Domenic Forte, \u201c<span class=\"title\"><span style=\"color: #000080\">Development and Evaluation of Hardware Obfuscation Benchmarks<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/link.springer.com\/journal\/41635\">J. Hardw. Syst. Secur. <\/a>(HASS) 2(2): 142-161 (2018).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/article\/10.1007\/s41635-018-0036-3\">Abstract<\/a> | <a href=\"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-content\/uploads\/sites\/689\/2026\/02\/s41635-018-0036-3.pdf\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TODAES&#8217;18] <\/span><\/strong>Kun Yang, Haoting Shen, Domenic Forte, <strong>Swarup Bhunia<\/strong>, and Mark Tehranipoor, \u201c<span class=\"title\"><span style=\"color: #000080\">Hardware-Enabled Pharmaceutical Supply Chain Security<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/journal\/todaes\">ACM Trans. Design Autom. Electr. Syst.<\/a> (TODAES) 23(2): 23:1-23:26 (2018).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/3144532\">Abstract<\/a> | <a href=\"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3144532\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[PIEEE&#8217;18] <\/span><\/strong>Sandip Ray, Mark M. Tehranipoor, Eric Peeters, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">System-on-Chip Platform Security Assurance: Architecture and Validation<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/proceedingsoftheieee.ieee.org\/july-2018\/\">Proceedings of the IEEE<\/a> (PIEE) 106(1): 21-37 (2018).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7987680\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?arnumber=7987680\">PDF<\/a>]<\/span><\/li>\n<\/ul>\n<h4>2017<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong><span style=\"color: #000080\">[TBIOCAS&#8217;17] <\/span><\/strong><span style=\"text-decoration: underline\">Robert Karam<\/span>, Steve Majerus, Dennis Bourbou, Margot S. Damaser, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Tunable and Lightweight On-Chip Event Detection for Implantable Bladder Pressure Monitoring Devices<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieee-cas.org\/publication\/TBioCAS\">IEEE Trans. Biomed. Circuits Syst.<\/a> (TBIOCAS) 11(6): 1303-1312 (2017).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8064659\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?arnumber=8064659\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[SPECTRUM&#8217;17] <\/span><\/strong>Sandip Ray, <span style=\"text-decoration: underline\">Abhishek Basak<\/span>, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Patchable Internet of Things<\/span>\u201d. <a href=\"https:\/\/spectrum.ieee.org\/\">IEEE Spectrum<\/a>\u00a0(SPECTRUM) November 2017.<\/li>\n<li><strong><span style=\"color: #000080\">[SPECTRUM&#8217;17] <\/span><\/strong>Mark Tehranipoor, Ujjwal Guin, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Invasion of the Hardware Snatchers: Cloned Electronics Pollute the Market<\/span>\u201d. <a href=\"https:\/\/spectrum.ieee.org\/\">IEEE Spectrum<\/a>\u00a0(SPECTRUM) May 2017.<\/li>\n<li><strong><span style=\"color: #000080\">[HASS&#8217;17] <\/span><\/strong>Anthony Bahadir Lopez, Korosh Vatanparvar, <span style=\"text-decoration: underline\">Atul Prasad Deb Nath<\/span>, <span style=\"text-decoration: underline\">Shuo Yang<\/span>, <strong>Swarup Bhunia<\/strong>, Mohammad Abdullah Al Faruque, &#8220;<span style=\"color: #000080\">A Security Perspective on the Battery Systems of the Internet of Things<\/span>&#8220;. <a href=\"https:\/\/link.springer.com\/journal\/41635\">Journal of Hardware and Systems Security<\/a> (HASS), Springer, 2017. <span style=\"color: #ff6600\"><strong>[Top published content in the Journal (one of 3), 2017, By Springer]<br \/><\/strong><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/article\/10.1007\/s41635-017-0007-0\">Abstract<\/a> | <a href=\"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-content\/uploads\/sites\/689\/2026\/02\/s41635-017-0007-0.pdf\">PDF<\/a>]<\/span><strong><br \/><\/strong><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[JMR&#8217;17] <\/span><\/strong>Cheng Chen, <span style=\"text-decoration: underline\">Fengchao Zhang<\/span>, <strong>Swarup Bhunia<\/strong>, and Soumyajit Mandal, \u201c<span style=\"color: #000080\">Broadband Quantitative NQR for Authentication of Vitamins and Dietary Supplements<\/span>\u201d. <a href=\"https:\/\/www.sciencedirect.com\/science\/article\/pii\/S1097664723006269?via%3Dihub\">The Journal of Magnetic Resonance<\/a> (JMR), 2017.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/www.sciencedirect.com\/science\/article\/pii\/S1090780717300745\">Abstract<\/a> | <a href=\"https:\/\/pdf.sciencedirectassets.com\/272577\/1-s2.0-S1090780717X00037\/1-s2.0-S1090780717300745\/main.pdf?X-Amz-Security-Token=IQoJb3JpZ2luX2VjEM3%2F%2F%2F%2F%2F%2F%2F%2F%2F%2FwEaCXVzLWVhc3QtMSJGMEQCIAR2ohnFsEkuCCgQMOXoceHWM2kyrnCCzmo2FwFNyZkKAiANHoXaK3FPJOYAPd7CwjwuwaOcw3n7qKSMK7pSdMhkZSq8BQiV%2F%2F%2F%2F%2F%2F%2F%2F%2F%2F8BEAUaDDA1OTAwMzU0Njg2NSIMyK4KZmkyszKLV%2BhQKpAFIphtPOEX%2FS%2BNbOV6i2sCzukAfqnvi%2BFTDHrBnKKAoWsVcLAtgv6myv47dVBR3PTCV7haGVYe1sH41Kszw20G1tfAW3%2FEtVfbcQP7ebi6Si0N2dRKE6fycHJ3EgmQEcEQkmQfjf0DqRt5JnLLymgoL98rnSdpWvb72y7czpyeh3VvxYbvIvJWfPCzbOVaSkP8U2a5iCj3a37%2B9vvWguZ3Fwrogc7Rb7Mxh37APrvevC%2BJjgM8zD1c66hz%2F8QJ4tXG7NyMw%2BdDfDAZwnTDq6FVx2%2BSxUZIZJwsZgT604NcpBKy92Tcot1suUFJJXdZ1wjXDwchXGGwxmrNxi4CWPrcscvQWmRkMUxlmG7Fh4Y5UjGtsF7brebu7ltaijUNhcNDB%2B%2BkALB3wQCFH%2F8RwEo5NYmd5LTTO0wYkVzAnBVvc4cV%2Fa0gAGafrrhgkQEUB2w%2FO%2BzPIOAM2Sut9pPJhmcW1QpQglsBCFNlKA98T8iYTLN%2F7QkMSJLhqf20zBzwXr8nALkq54U3A8qQrcZoXnFmjnLR6qI74BhuzJITiImY4qqjWJhGEjGfilAgTGJvGotboMGl%2Fb%2BZFhBqIAwXulltLXtWkwEDI8b0sefYweFB0GONwmh7kNcEfl9p%2BJEub1aJ46Z4%2BRLjvKn3keGaOVcuw5bIQIOaJcnIw%2B%2FSVMimmg6arE8x1mGBCwsgmvkzcQ8fj4Okr%2Fau%2B73DEHtTYYqHlO17u17lQAgPw%2FQB%2BV9Gw%2BnLPdtAQTVpx%2FfxDM9ynZcUL2RXGJgrk3u%2FKd2nI0iAQGWQUkw9hrXfJV%2B2x165qsvoqa4w4M4Gl%2BIp3cRuVDZaDjkdsC0gAt4VHNrs3jNkT%2BoPctEbyEtTYZGICrR2ldcw7f6ozAY6sgHypNRlyiz2t8EAiDo5XB2W2vMN3ZiDmMMQAnGAeZP5QNH8Qe4sGWxsGYxE3YcOpMuY47W3xM7Z9yosjT05t42udrYAYJyoBm9jtUzK6tm%2BRZWBZOcEd1vqgwLjMecHRF2K%2FcVRSybOj73CCjbhCePvSHQlo482GHSRYsJLl6nu38nKY9MvcQKcni44xuOzlf0FpLf8TPXCho2sHWjgXiJRLGu3aBc3CtcHIfVTkVHLm2SG&amp;X-Amz-Algorithm=AWS4-HMAC-SHA256&amp;X-Amz-Date=20260209T202736Z&amp;X-Amz-SignedHeaders=host&amp;X-Amz-Expires=300&amp;X-Amz-Credential=ASIAQ3PHCVTYQA6K3GRP%2F20260209%2Fus-east-1%2Fs3%2Faws4_request&amp;X-Amz-Signature=6672722fc366d54e3c57c289abf688b15c2014cab91d8a80f8071e3774277fd5&amp;hash=406a93aa7b6b91d87729c3cec998cd8b948e9c438467601ccf41aa572434aae2&amp;host=68042c943591013ac2b2430a89b270f6af2c76d8dfd086a07176afe7c76c2c61&amp;pii=S1090780717300745&amp;tid=spdf-1808a5d8-0918-4c3b-8040-d4165f85ed3c&amp;sid=c4cb4cd1181958477c9a07d89caf471de026gxrqa&amp;type=client&amp;tsoh=d3d3LnNjaWVuY2VkaXJlY3QuY29t&amp;rh=d3d3LnNjaWVuY2VkaXJlY3QuY29t&amp;ua=111457050055500c01&amp;rr=9cb61bbe19a055f7&amp;cc=us\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[JOLPE&#8217;17] <\/span><\/strong><span style=\"text-decoration: underline\">Kai Yang<\/span>, <span style=\"text-decoration: underline\">Robert Karam<\/span>, <span style=\"text-decoration: underline\">Somnath Paul<\/span>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Energy-Efficient Reconfigurable Hardware Accelerators for Data-Intensive Applications<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/www.mdpi.com\/journal\/jlpea\">J. Low Power Electron.<\/a> (JOLPE) 13(3): 382-394 (2017).<\/li>\n<li><strong><span style=\"color: #000080\">[ESL&#8217;17] <\/span><\/strong>Greg Stitt, <span style=\"text-decoration: underline\">Robert Karam<\/span>, <span style=\"text-decoration: underline\">Kai Yang<\/span>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">A Uniquified Virtualization Approach to Hardware Security<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/tocresult.jsp?isnumber=9179054&amp;punumber=4563995\">IEEE Embed. Syst. Lett.<\/a> (ESL) 9(3): 53-56 (2017).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7873282\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7873282\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[HASS&#8217;17] <\/span><\/strong>Bicky Shakya, Hassan Salmani, Domenic Forte, <strong>Swarup Bhunia<\/strong>, and Mark Tehranipoor, \u201c<span class=\"title\"><span style=\"color: #000080\">Benchmarking of Hardware Trojans and Maliciously Affected Circuits<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/link.springer.com\/journal\/41635\">J. Hardw. Syst. Secur.<\/a> (HASS) 1(1): 85-102 (2017). <span style=\"color: #ff6600\"><strong>[Top published content in the Journal (one of 3), 2017, By Springer]<br \/><\/strong><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/article\/10.1007\/s41635-017-0001-6\">Abstract<\/a> | <a href=\"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-content\/uploads\/sites\/689\/2026\/02\/s41635-017-0001-6.pdf\">PDF<\/a>]<\/span><strong><br \/><\/strong><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[JETTA&#8217;17] <\/span><\/strong><span style=\"text-decoration: underline\">Tamzidul Hoque<\/span>, <span style=\"text-decoration: underline\">Seetharam Narasimhan<\/span>, <span style=\"text-decoration: underline\">Xinmu Wang<\/span>, Sanchita Mal-Sarkar, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Golden-Free Hardware Trojan Detection with High Sensitivity Under Process Noise<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/link.springer.com\/journal\/10836\">J. Electron. Test.<\/a> (JETTA) 33(1): 107-124 (2017).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1007\/s10836-016-5632-y\">Abstract<\/a> | <a href=\"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-content\/uploads\/sites\/689\/2026\/02\/s10836-016-5632-y.pdf\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TDSC&#8217;17] <\/span><\/strong>Ujjwal Guin, <strong>Swarup Bhunia<\/strong>, Domenic Forte, and Mark M. Tehranipoor, \u201c<span class=\"title\"><span style=\"color: #000080\">SMA: A System-Level Mutual Authentication for Protecting Electronic Hardware and Firmware<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/journal\/tdsc\">IEEE Trans. Dependable Secur. Comput.<\/a> (TDSC) 14(3): 265-278 (2017).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7585119\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7585119\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TIFS&#8217;17] <\/span><\/strong><span style=\"text-decoration: underline\">Abhishek Basak<\/span>, <strong>Swarup Bhunia<\/strong>, Thomas Tkacik, and Sandip Ray, \u201c<span class=\"title\"><span style=\"color: #000080\">Security Assurance for System-on-Chip Designs With Untrusted IPs<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/journal\/tifs\">IEEE Trans. Inf. Forensics Secur.<\/a> (TIFS) 12(7): 1515-1528 (2017).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7833075\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7833075\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[JETC&#8217;17] <\/span><\/strong><span style=\"text-decoration: underline\">Robert Karam<\/span>, Somnath Paul, Ruchir Puri, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Memory-Centric Reconfigurable Accelerator for Classification and Machine Learning Applications<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/journal\/jetc\">ACM J. Emerg. Technol. Comput. Syst.<\/a> (JETC) 13(3): 34:1-34:24 (2017).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/2997649\">Abstract<\/a> | <a href=\"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2997649\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[D&amp;T&#8217;17] <\/span><\/strong>Dongyeob Shin, Jangwon Park, Jongsun Park, <span style=\"text-decoration: underline\">Somnath Paul<\/span>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Adaptive ECC for Tailored Protection of Nanoscale Memory<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/mostRecentIssue.jsp?punumber=6221038\">IEEE Des. Test<\/a> (D&amp;T) 34(6): 84-93 (2017).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7586136\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7586136\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TMSCS&#8217;17] <\/span><\/strong>Sanchita Mal-Sarkar, <span style=\"text-decoration: underline\">Robert Karam<\/span>, <span style=\"text-decoration: underline\">Seetharam Narasimhan<\/span>, <span style=\"text-decoration: underline\">Anandaroop Ghosh<\/span>, <span style=\"text-decoration: underline\">Aswin Raghav Krishna<\/span>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Design and Validation for FPGA Trust under Hardware Trojan Attacks<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=6687315\">IEEE Trans. Multi Scale Comput. Syst.<\/a> (TMSCS) 2(3): 186-198 (2017).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7497464\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7497464\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TVLSI&#8217;17] <\/span><\/strong><span style=\"text-decoration: underline\">Wenchao Qian<\/span>, <span style=\"text-decoration: underline\">Christopher Babecki<\/span>, <span style=\"text-decoration: underline\">Robert Karam<\/span>, <span style=\"text-decoration: underline\">Somnath Paul<\/span>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">ENFIRE: A Spatio-Temporal Fine-Grained Reconfigurable Hardware<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=92\">IEEE Trans. Very Large Scale Integr. Syst.<\/a> (TVLSI) 25(1): 177-188 (2017).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7499840\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7499840\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TCAS-II&#8217;17] <\/span><\/strong><span style=\"text-decoration: underline\">Wenchao Qian<\/span>, Pai-Yu Chen, Ligang Gao, <strong>Swarup Bhunia<\/strong>, and Shimeng Yu, \u201c<span class=\"title\"><span style=\"color: #000080\">Energy-Efficient Adaptive Computing With Multifunctional Memory<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieee-cas.org\/publication\/TCAS-I\">IEEE Trans. Circuits Syst.<\/a> (TCAS-II) Express Briefs 64-II(2): 191-195 (2017).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7453154\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7453154\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TODAES&#8217;17] <\/span><\/strong>Kan Xiao, Domenic Forte, Yier Jin, Ramesh Karri, <strong>Swarup Bhunia<\/strong>, Mark Tehranipoor, \u201c<span class=\"title\"><span style=\"color: #000080\">Hardware Trojans: Lessons Learned after One Decade of Research<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/journal\/todaes\">ACM Trans. Design Autom. Electr. Syst.<\/a> (TODAES) 22(1): 6:1-6:23 (2016).<span style=\"color: #ff6600\"><strong>[ACM Computing Reviews Notable Computing Books and Articles 2016, <\/strong><\/span><span style=\"color: #ff6600\"><strong><a style=\"color: #ff6600\" href=\"http:\/\/www.computingreviews.com\/recommend\/bestof\/notableitems.cfm?bestYear=2016\">Hardware Category<\/a>] [ACM TODAES 2017 Best Paper Award]<br \/><\/strong><\/span><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/2906147\">Abstract<\/a> | <a href=\"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2906147\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2016<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong><span style=\"color: #000080\">[TVLSI&#8217;16] <\/span><\/strong><span style=\"text-decoration: underline\">Robert Karam<\/span>, Ruchir Puri, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Energy-Efficient Adaptive Hardware Accelerator for Text Mining Application Kernels<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=92\">IEEE Trans. Very Large Scale Integr. Syst.<\/a> (TVLSI) 24(12): 3526-3537 (2016).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7468565\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7468565\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TMSCS&#8217;16] <\/span><\/strong>Sandip Ray, Jongsun Park, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Wearables, Implants, and Internet of Things: Towards Unifying Technologies to Support Diverse Paradigms<\/span>\u201d, <a href=\"https:\/\/ieeexplore.ieee.org\/document\/7294748\">IEEE Transactions on Multi-Scale Computing Systems<\/a>. (TMSCS) 2(2): 123-128 (2016) [Perspective paper in the Special issue on Wearables, Implants, and Internet of Things]. <span style=\"color: #ff6600\"><strong>[Featured paper in the April-June 2016 Issue]<\/strong><\/span><span style=\"color: #ff6600\"><strong><br \/><\/strong><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7450639\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7450639\">PDF<\/a>]<\/span><strong><br \/><\/strong><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TCBB&#8217;16] <\/span><\/strong>Cheng Chen, <span style=\"text-decoration: underline\">Fengchao Zhang<\/span>, Soumyajit Mandal, <strong>Swarup Bhunia<\/strong>, Jamie Barras, and Kaspar Althoefer, \u201c<span class=\"title\"><span style=\"color: #000080\">Authentication of Medicines Using Nuclear Quadrupole Resonance Spectroscopy<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/journal\/tcbb\">IEEE ACM Trans. Comput. Biol. Bioinform.<\/a> (TCBB) 13(3): 417-430 (2016).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1109\/TCBB.2015.2511763\">Abstract<\/a> | <a href=\"https:\/\/dl.acm.org\/doi\/pdf\/10.1109\/TCBB.2015.2511763\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TVLSI&#8217;16] <\/span><\/strong><span style=\"text-decoration: underline\">Yu Zheng<\/span>, <span style=\"text-decoration: underline\">Abhishek Basak<\/span>, <span style=\"text-decoration: underline\">Fengchao Zhang<\/span>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">DScanPUF: A Delay-Based Physical Unclonable Function Built Into Scan Chain<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=92\">IEEE Trans. Very Large Scale Integr. Syst.<\/a> (TVLSI) 24(3): 1059-1070 (2016).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7112515\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7112515\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TC&#8217;15] <\/span><\/strong><span style=\"text-decoration: underline\">Christopher Babecki<\/span>, <span style=\"text-decoration: underline\">Wenchao Qian<\/span>, <span style=\"text-decoration: underline\">Somnath Paul<\/span>, <span style=\"text-decoration: underline\">Robert Karam<\/span>, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">An Embedded Memory-Centric Reconfigurable Hardware Accelerator for Security Applications<\/span>\u201d. <a href=\"https:\/\/ieeexplore.ieee.org\/document\/1675525\">IEEE Transactions on Computers<\/a> (TC) 65(10):\u00a03196-3202\u00a0(2016)<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7366553\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7366553\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2015<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong><span style=\"color: #000080\">[PIEEE&#8217;15] <\/span><\/strong><span style=\"text-decoration: underline\">Robert Karam<\/span>, Ruchir Puri, Swaroop Ghosh, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Emerging Trends in Design and Applications of Memory based Computing and Content Addressable Memories<\/span>\u201d. <a href=\"https:\/\/ieeexplore.ieee.org\/document\/7159145\">Proceedings of the IEEE<\/a> (PIEEE) 103(8): 1311-1330 (2015).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7159147\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7159147\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TBME&#8217;15] <\/span><\/strong><span style=\"text-decoration: underline\">Robert Karam<\/span>, Dennis Bourbeau, Steve Majerus, Iryna Makovey, Howard B. Goldman, Margot S. Damaser, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Real-Time Contraction Event Detection from Bladder Pressure Recordings for Effective Diagnosis and Treatment of Urinary Incontinence<\/span>\u201d. <a href=\"https:\/\/www.embs.org\/tbme\/\">IEEE Transactions on Biomedical Engineering<\/a> (TBME) 5789-5792 (2015).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/pmc.ncbi.nlm.nih.gov\/articles\/PMC6946053\/\">Abstract<\/a> | <a href=\"https:\/\/pmc.ncbi.nlm.nih.gov\/articles\/PMC6946053\/pdf\/nihms-1057119.pdf\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TCAD&#8217;15] <\/span><\/strong><span style=\"text-decoration: underline\">Abhishek Basak<\/span> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">P-Val: Antifuse-Based Package-Level Defense Against Counterfeit ICs<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=43\">IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.<\/a> (TCAD) 35(7): 1067-1078 (2015).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7329938\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7329938\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TCAD&#8217;15] <\/span><\/strong><span style=\"text-decoration: underline\">Yu Zheng<\/span>, <span style=\"text-decoration: underline\">Shuo Yang<\/span>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">SeMIA: Self-Similarity-Based IC Integrity Analysis<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=43\">IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.<\/a> (TCAD) 35(1): 37-48 (2015).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7131524\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7131524\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[SST&#8217;15] <\/span><\/strong>Wenbo Chen, Wenchao Lu, Branden Long, Yibo Li, David Gilmer, Gennadi Bersuker, <strong>Swarup Bhunia<\/strong>, and Rashmi Jha, \u201c<span style=\"color: #000080\">Switching Characteristics of W\/Zr\/HfO2\/TiN ReRAM Devices for Multi-level Cell Non-Volatile Memory Applications<\/span>\u201d. <a href=\"https:\/\/iopscience.iop.org\/journal\/0268-1242\">Semiconductor Science and Technology<\/a>\u00a0(SST) (2015).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/iopscience.iop.org\/article\/10.1088\/0268-1242\/30\/7\/075002\">Abstract<\/a> | <a href=\"https:\/\/iopscience.iop.org\/article\/10.1088\/0268-1242\/30\/7\/075002\/pdf\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[JEDS&#8217;15] <\/span><\/strong>Tina He, <span style=\"text-decoration: underline\">Fengchao Zhang<\/span>, <strong>Swarup Bhunia<\/strong>, and Philip Feng, \u201c<span style=\"color: #000080\">Silicon Carbide (SiC) Nanoelectromechanical Antifuse for Ultralow-Power FPGA Interconnects<\/span>\u201d.\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=6245494\">IEEE Journal of the Electron Devices Society<\/a> (JEDS) (2015)<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7083695\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7083695\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TCAS-II&#8217;15] <\/span><\/strong>Wen Yueh, Subho Chatterjee, Muneeb Zia, <strong>Swarup Bhunia<\/strong>, and Saibal Mukhopadhyay, &#8220;<span class=\"title\"><span style=\"color: #000080\">A Memory-Based Logic Block With Optimized-for-Read SRAM for Energy-Efficient Reconfigurable Computing Fabric<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieee-cas.org\/publication\/TCAS-I\">IEEE Trans. Circuits Syst.<\/a> (TCAS-II) Express Briefs 62-II(6): 593-597 (2015).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7051284\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7051284\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[JETCAS&#8217;15] <\/span><\/strong>Kaushik Roy, Deliang Fan, Xuanyao Fong, Mrigank Sharad, <span style=\"text-decoration: underline\">Somnath Paul<\/span>, Subho Chatterjee, <strong>Swarup Bhunia<\/strong>, and Saibal Mukhopadhyay, \u201c<span style=\"color: #000080\">Exploring Spin Transfer Torque Devices for Unconventional Computing<\/span>\u201d. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/mostRecentIssue.jsp?punumber=5503868\">IEEE Journal on Emerging and Selected Topics in Circuits and Systems<\/a> (JETCAS) (2015) [Perspective paper in the Special issue on Computing in Emerging Technologies].<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7055378\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7055378\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[D&amp;T&#8217;15] <\/span><\/strong>Swaroop Ghosh, <span style=\"text-decoration: underline\">Abhishek Basak<\/span>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">How Secure Are Printed Circuit Boards Against Trojan Attacks?<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/mostRecentIssue.jsp?punumber=6221038\">IEEE Des. Test<\/a> (D&amp;T) 32(2): 7-16 (2015). <span style=\"color: #ff6600\"><strong>[Top 3 Most Popular Articles, May 2015]<br \/><\/strong><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6878437\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6878437\">PDF<\/a>]<\/span><strong><br \/><\/strong><\/span><\/li>\n<\/ul>\n<h4>2014<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong><span style=\"color: #000080\">[TC&#8217;14] <\/span><\/strong><span style=\"text-decoration: underline\">Xinmu Wang<\/span>, <span style=\"text-decoration: underline\">Yu Zheng<\/span>, <span style=\"text-decoration: underline\">Abhishek Basak<\/span> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">IIPS: Infrastructure IP for Secure SoC Design<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/journal\/itco\">IEEE Trans. Computers<\/a> (TC) 64(8): 2226-2238 (2014).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6915693\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6915693\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[PIEEE&#8217;14] <\/span>Swarup Bhunia<\/strong>, Michael Hsiao, Mainak Banga, and Seetharam Narasimhan, \u201c<span class=\"title\"><span style=\"color: #000080\">Hardware Trojan Attacks: Threat Analysis and Countermeasures<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dblp.org\/db\/journals\/pieee\/pieee102.html#journals\/pieee\/BhuniaHBN14\">Proc. IEEE<\/a> (PIEE) 102(8): 1229-1247 (2014).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6856140\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?arnumber=6856140\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TVLSI&#8217;14] <\/span><\/strong><span style=\"text-decoration: underline\">Somnath Paul<\/span>, <span style=\"text-decoration: underline\">Aswin Krishna<\/span>, <span style=\"text-decoration: underline\">Wenchao Qian<\/span>, <span style=\"text-decoration: underline\">Robert Karam<\/span>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">MAHA: An Energy-Efficient Malleable Hardware Accelerator for Data-Intensive Applications<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=92\">IEEE Trans. Very Large Scale Integr. Syst.<\/a> (TVLSI) 23(6): 1005-1016 (2014).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6891374\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?arnumber=6891374\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TVLSI&#8217;14] <\/span><\/strong><span style=\"text-decoration: underline\">Yu Zheng<\/span>, <span style=\"text-decoration: underline\">Xinmu Wang,<\/span> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">SACCI: Scan-Based Characterization Through Clock Phase Sweep for Counterfeit Chip Detection<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=92\">IEEE Trans. Very Large Scale Integr. Syst.<\/a> (TVLSI) 23(5): 831-841 (2014).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6837518\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/document\/6837518\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TBIOCAS&#8217;14] <\/span><\/strong><span style=\"text-decoration: underline\">Abhishek Basak<\/span> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Implantable Ultrasonic Imaging Assembly for Automated Monitoring of Internal Organs<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieee-cas.org\/publication\/TBioCAS\">IEEE Trans. Biomed. Circuits Syst.<\/a> (TBIOCAS) 8(6): 881-890 (2014).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6809222\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6809222\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TCAS-II&#8217;14] <\/span><\/strong>Jongsun Park, Jangwon Park and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">VL-ECC: Variable Data-Length Error Correction Code for Embedded Memory in DSP Applications<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieee-cas.org\/publication\/TCAS-I\">IEEE Trans. Circuits Syst.<\/a> (TCAS-II) Express Briefs 61-II(2): 120-124 (2014).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6677546\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6677546\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TVLSI&#8217;14] <\/span><\/strong><span style=\"text-decoration: underline\">Anandaroop Ghosh<\/span>, <span style=\"text-decoration: underline\">Somnath Paul<\/span>, Jongsun Park, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Improving Energy Efficiency in FPGA Through Judicious Mapping of Computation to Embedded Memory Blocks<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=92\">IEEE Trans. Very Large Scale Integr. Syst.<\/a> (TVLSI) 22(6): 1314-1327 (2014).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6573396\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6573396\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TVLSI&#8217;14] <\/span><\/strong><span style=\"text-decoration: underline\">Somnath Paul<\/span>, <span style=\"text-decoration: underline\">Saibal Mukhopadhyay<\/span> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">A Variation-Aware Preferential Design Approach for Memory-Based Reconfigurable Computing<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=92\">IEEE Trans. Very Large Scale Integr. Syst.<\/a> (TVLSI) 22(12): 2449-2461 (2014).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5361296\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5361296\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2013<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong><span style=\"color: #000080\">[TC&#8217;13] <\/span><\/strong><span style=\"text-decoration: underline\">Seetharam Narasimhan<\/span>, <span style=\"text-decoration: underline\">Dongdong Du<\/span>, <span style=\"text-decoration: underline\">Rajat Subhra Chakraborty<\/span>, <span style=\"text-decoration: underline\">Somnath Paul<\/span>, Francis Wolff, Christos Papachristou, Kaushik Roy, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Hardware Trojan Detection by Multiple-Parameter Side-Channel Analysis<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/journal\/itco\">IEEE Trans. Computers<\/a> (TC) 62(11): 2183-2195 (2013).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6275439\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6275439\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[D&amp;T&#8217;13] <\/span><\/strong><span style=\"text-decoration: underline\">Seetharam Narasimhan<\/span>, Wen Yueh, <span style=\"text-decoration: underline\">Xinmu Wang<\/span>, Saibal Mukhopadhyay, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Improving IC Security Against Trojan Attacks Through Integration of Security Monitors<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/mostRecentIssue.jsp?punumber=6221038\">IEEE Des. Test Comput.<\/a> (D&amp;T) 29(5): 37-46 (2013).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6248276\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6248276\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[D&amp;T&#8217;13] <\/span>Swarup Bhunia<\/strong>, Miron Abramovici, Dakshi Agarwal, Paul Bradley, Michael S. Hsiao, Jim Plusquellic, and Mohammad Tehranipoor, \u201c<span class=\"title\"><span style=\"color: #000080\">Protection Against Hardware Trojan Attacks: Towards a Comprehensive Solution<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieee-cas.org\/publication\/ieee-design-test-magazine\">IEEE Des. Test<\/a> (D&amp;T) 30(3): 6-17 (2013). <span style=\"color: #ff6600\"><strong>[Top 20 Most Popular Articles, May 2013]<br \/><\/strong><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6189843\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6189843\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2012<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong><span style=\"color: #000080\">[TCAS-I&#8217;12] <\/span><\/strong><span style=\"text-decoration: underline\">Seetharam Narasimhan<\/span>, <span style=\"text-decoration: underline\">Keerthi Kunaparaju<\/span>, <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Healing of DSP Circuits Under Power Bound Using Post-Silicon Operand Bitwidth Truncation<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieee-cas.org\/publication\/TCAS-I\">IEEE Trans. Circuits Syst. I Regul. Pap.<\/a> (TCAS-I) 59-I(9): 1932-1941 (2012).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6151873\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6151873\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2011<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong><span style=\"color: #000080\">[JETTA&#8217;11] <\/span><\/strong><span style=\"text-decoration: underline\">Rajat Subhra Chakraborty<\/span> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Security Against Hardware Trojan Attacks Using Key-Based Design Obfuscation<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/link.springer.com\/journal\/10836\">J. Electron. Test.<\/a> (JETTA) 27(6): 767-785 (2011).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5361306\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5361306\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[JETCAS&#8217;11] <\/span><\/strong><span style=\"text-decoration: underline\">Somnath Paul<\/span>, Subho Chatterjee, Saibal Mukhopadhyay and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Energy-Efficient Reconfigurable Computing Using a Circuit-Architecture-Software Co-Design Approach<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/www.ieee-pels.org\/publications\/journal-of-emerging-and-selected-topics-in-power-electronics\/\">IEEE J. Emerg. Sel. Topics Circuits Syst.<\/a> (JETCAS) 1(3): 369-380 (2011).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6025217\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6025217\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[D&amp;T&#8217;11] <\/span><\/strong><span style=\"text-decoration: underline\">Seetharam Narasimhan<\/span>, <span style=\"text-decoration: underline\">Rajat Subhra Chakraborty<\/span>, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Hardware IP Protection during Evaluation Using Embedded Sequential Trojan<\/span>\u201d. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/mostRecentIssue.jsp?punumber=6221038\">IEEE Design &amp; Test of Computers<\/a>\u00a0(D&amp;T) (2011).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6225464\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6225464\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TC&#8217;11] <\/span><\/strong><span style=\"text-decoration: underline\">Somnath Pau<\/span>l, Fang Cai, <span style=\"text-decoration: underline\">Xinmiao Zhang<\/span>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Reliability-Driven ECC Allocation for Multiple Bit Error Resilience in Processor Cache<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/journal\/itco\">IEEE Trans. Computers<\/a> (TC) 60(1): 20-34 (2011).<br \/><a href=\"http:\/\/ieeexplore.ieee.org\/xpl\/tocresult.jsp?isnumber=5648473\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<\/span><\/span><\/a><a href=\"https:\/\/ieeexplore.ieee.org\/document\/5601695\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5601695\">PDF<\/a>]<\/li>\n<li><strong><span style=\"color: #000080\">[TBIOCAS&#8217;11] <\/span><\/strong><span style=\"text-decoration: underline\">Seetharam Narasimhan<\/span><span style=\"color: #313535;font-family: gentonalight\">, Hillel Chiel and <\/span><strong>Swarup Bhunia<\/strong><span style=\"color: #313535;font-family: gentonalight\">, \u201c<span style=\"color: #000080\">Ultra Low-Power and Robust Digital Signal Processing Hardware for Implantable Neural Interface Microsystems\u201d. <\/span><a href=\"http:\/\/ieeexplore.ieee.org\/xpl\/tocresult.jsp?isnumber=5765036\">IEEE Transactions on Biomedical Circuits and Systems<\/a> (TBioCAS) <span style=\"color: #313535;font-family: gentonalight\">5(<\/span>2): 169 \u2013 178 (2011).<br \/><a href=\"http:\/\/ieeexplore.ieee.org\/xpl\/tocresult.jsp?isnumber=5648473\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<\/span><\/span><\/a><a href=\"https:\/\/ieeexplore.ieee.org\/document\/5620931\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5620931\">PDF<\/a>]<\/span><\/li>\n<\/ul>\n<h4>2010<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong><span style=\"color: #000080\">[SCIENCE&#8217;10] <\/span><\/strong>Te-Hao Lee, <strong>Swarup Bhunia<\/strong>, and Mehran Mehregany, \u201c<span style=\"color: #000080\">Electromechanical Computing at 500 \u00b0C with Silicon Carbide<\/span>\u201d. <a href=\"https:\/\/www.jstor.org\/stable\/i40047906\">Science<\/a> (SCIENCE) 329(5997): 1316-1318 (2010).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/pubmed.ncbi.nlm.nih.gov\/20829479\/\">Abstract<\/a> | <a href=\"https:\/\/www.science.org\/doi\/10.1126\/science.1192511\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TVLSI&#8217;10] <\/span><\/strong><span style=\"text-decoration: underline\">Somnath Paul<\/span> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Dynamic Transfer of Computation to Processor Cache for Yield and Reliability Improvement<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=92\">IEEE Trans. Very Large Scale Integr.<\/a> (TVLSI) Syst. 19(8): 1368-1379 (2011).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5483140\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5483140\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TNANO&#8217;10] <\/span><\/strong><span style=\"text-decoration: underline\">Somnath Paul<\/span><span style=\"color: #313535;font-family: gentonalight\">, Saibal Mukhopadhyay and <\/span><strong>Swarup Bhunia<\/strong><span style=\"color: #313535;font-family: gentonalight\">, &#8220;<span style=\"color: #000080\">A Circuit and Architecture Co-design Approach for Hybrid\u00a0CMOS-STTRAM non-volatile<\/span>&#8220;<\/span><span style=\"color: #313535;font-family: gentonalight\">FPGA<\/span><span style=\"color: #313535;font-family: gentonalight\">&#8220;. <\/span><span style=\"text-decoration: underline\"><a href=\"https:\/\/ieeenano.org\/publications\/t-nano\/\">IEEE Transactions on Nanotechnology<\/a> (TNANO)<\/span><span style=\"color: #313535;font-family: gentonalight\"><span style=\"text-decoration: underline\">,<\/span> 10(<\/span>3): 385 \u2013 394 (2010).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5409553\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5409553\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TNANO&#8217;10] <\/span><\/strong><span style=\"text-decoration: underline\">Somnath Paul<\/span> and <strong>Swarup Bhunia<\/strong>, &#8220;<span style=\"color: #000080\">A Scalable Memory-Based Reconfigurable Computing Framework for Nanoscale Crossbar<\/span>&#8220;. <a href=\"https:\/\/tnano.org\/\">IEEE Transactions on Nanotechnology<\/a> (TNANO) 11(3): 451\u2013 462 (2012).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5409545\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5409545\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TODAES&#8217;10] <\/span><\/strong><span style=\"text-decoration: underline\">Somnath Paul<\/span>, Hamid Mahmoodi and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">Low-overhead\u00a0F<sub>max<\/sub> calibration at multiple operating points using delay-sensitivity-based path selection<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/journal\/todaes\">ACM Trans. Design Autom. Electr. Syst. 15(2)<\/a>(TODAES) 19:1-19:34 (2010).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/1698759.1698769\">Abstract<\/a> | <a href=\"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1698759.1698769\">PDF<\/a>]<\/span><\/li>\n<\/ul>\n<h4>2009<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong><span style=\"color: #000080\">[JETC&#8217;09] <\/span><\/strong><span style=\"text-decoration: underline\">Rajat Subhra Chakraborty<\/span> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">A study of asynchronous design methodology for robust CMOS-nano hybrid system design<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/journal\/jetc\">ACM J. Emerg. Technol. Comput. Syst.<\/a> (JETC) 5(3): 12:1-12:22 (2009).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/1568485.1568486\">Abstract<\/a> | <a href=\"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1568485.1568486\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TCAD&#8217;09] <\/span><\/strong><span style=\"text-decoration: underline\">Rajat Subhra Chakraborty<\/span> and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">HARPOON: An Obfuscation-Based SoC Design Methodology for Hardware Protection<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=43\">IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.<\/a> (TCAD) 28(10): 1493-1502 (2009). <span style=\"color: #ff6600\"><strong>[Top 50 Most Cited Articles, 1990-2026]<\/strong><\/span><br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5247148\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5247148\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[IET&#8217;09] <\/span><\/strong><span style=\"text-decoration: underline\">Rajat Subhra Chakraborty<\/span>, <span style=\"text-decoration: underline\">Somnath Paul<\/span>, <span style=\"text-decoration: underline\">Yu Zhou<\/span>, and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">Low-power hybrid complementary metaloxide- semiconductor-nano-electro-mechanical systems field programmable gate array: circuit level analysis and defect-aware mapping<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ietresearch.onlinelibrary.wiley.com\/journal\/ietcdt\">IET Comput. Digit. Tech.<\/a> (IET) 3(6): 609-624 (2009).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/digital-library.theiet.org\/doi\/abs\/10.1049\/iet-cdt.2008.0135\">Abstract]<\/a><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TVLSI&#8217;09] <\/span><\/strong>Patrick Ndai, Nauman Rafique, Mithuna Thottethodi, Swaroop Ghosh, <strong>Swarup Bhunia<\/strong>, and Kaushik Roy, &#8220;<span class=\"title\"><span style=\"color: #000080\">Trifecta: A Nonspeculative Scheme to Exploit Common, Data-Dependent Subcritical Paths<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=92\">IEEE Trans. Very Large Scale Integr. Syst.<\/a> (TVLSI) 18(1): 53-65 (2010).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4895686\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4895686\">PDF<\/a>]<\/span><\/li>\n<\/ul>\n<h4>2008<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong><span style=\"color: #000080\">[TC&#8217;08] <\/span><\/strong>Patrick Ndai, <strong>Swarup Bhunia<\/strong>, Amit Agarwal, and Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">Within-Die Variation-Aware Scheduling in Superscalar Processors for Improved Throughput<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/journal\/itco\">IEEE Trans. Computers<\/a> (TC) 57(7): 940-951 (2008).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4468699\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4468699\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[JETTA&#8217;08] <\/span>Swarup Bhunia<\/strong>, Hamid Mahmoodi, Arijit Raychowdhury, and Kaushik Roy, &#8220;<span class=\"title\"><span style=\"color: #000080\">Arbitrary Two-Pattern Delay Testing Using a Low-Overhead Supply Gating Technique<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/link.springer.com\/journal\/10836\">J. Electron. Test.<\/a> (JETTA) 24(6): 577-590 (2008).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/article\/10.1007\/s10836-008-5072-4\">Abstract<\/a> | <a href=\"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-content\/uploads\/sites\/689\/2026\/02\/s10836-008-5072-4.pdf\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TVLSI&#8217;08] <\/span><\/strong>Animesh Datta, <strong>Swarup Bhunia<\/strong>, Jung Hwan Choi, Saibal Mukhopadhyay, and Kaushik Roy &#8220;<span class=\"title\"><span style=\"color: #000080\">Profit Aware Circuit Design Under Process Variations Considering Speed Binning<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=92\">IEEE Trans. Very Large Scale Integr. Syst.<\/a> (TVLSI) 16(7): 806-815 (2008).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4553748\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4553748\">PDF<\/a>]<\/span><\/li>\n<\/ul>\n<h4>2007<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong><span style=\"color: #000080\">[TCAS-I&#8217;07] <\/span><\/strong><span style=\"text-decoration: underline\">Rajat Subhra Chakraborty<\/span>, <span style=\"text-decoration: underline\">Seetharam Narasimhan<\/span>, and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">Hybridization of CMOS With CNT-Based Nano-Electromechanical Switch for Low Leakage and Robust Circuit Design<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieee-cas.org\/publication\/TCAS-I\">IEEE Trans. Circuits Syst. I<\/a> (TCAS-I) 54-I(11):\u00a02480-2488\u00a0(2007).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4383234\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4383234\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TODAES&#8217;07] <\/span><\/strong>Swaroop Ghosh, <strong>Swarup Bhunia<\/strong>, and Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">Low-Power and testable circuit synthesis using Shannon decomposition<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/journal\/todaes\">ACM Trans. Design Autom. Electr. Syst.<\/a> (TODAES) 12(4): 47 (2007).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4383234\">Abstract<\/a> | <a href=\"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1278349.1278360\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TVLSI&#8217;07] <\/span><\/strong>Amit Agarwal, Kunhyuk Kang, <strong>Swarup Bhunia<\/strong>, James Gallagher, and Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">Device-Aware Yield-Centric Dual-V<sub>t<\/sub> Design Under Parameter Variations in Nanoscale Technologies<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=92\">IEEE Trans. Very Large Scale Integr. Syst.<\/a> (TVLSI) 15(6): 660-671 (2007).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4231874\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4231874\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TCAD&#8217;07] <\/span><\/strong>Swaroop Ghosh,<strong> Swarup Bhunia<\/strong>, and Kaushik Roy, \u201c<span style=\"color: #000080\">CRISTA: A New Paradigm for Low-Power, Variation-Tolerant, and Adaptive Circuit Synthesis Using Critical Path Isolation<\/span>&#8220;.\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=43\">IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.<\/a> (TCAD) 26(11): 1947-1956 (2007). <strong><span style=\"color: #ff6600\">[Top 10 downloaded papers in Nov. 2007]<\/span><\/strong><br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4352005\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4352005\">PDF<\/a>]<\/span><\/li>\n<\/ul>\n<h4>2006<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong><span style=\"color: #000080\">[TVLSI&#8217;06] <\/span><\/strong>Nilanjan Banerjee, Arijit Raychowdhury, Kaushik Roy, <strong>Swarup Bhunia<\/strong>, and Hamid Mahmoodi, \u201c<span class=\"title\"><span style=\"color: #000080\">Novel Low-Overhead Operand Isolation Techniques for Low-Power Datapath Synthesis<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=92\">IEEE Trans. Very Large Scale Integr. Syst.<\/a> (TVLSI) 14(9): 1034-1039 (2006).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1524154\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1524154\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TCAD&#8217;06] <\/span><\/strong>Swaroop Ghosh, <strong>Swarup Bhunia<\/strong>, Arijit Raychowdhury, and Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">A Novel Delay Fault Testing Methodology Using Low-Overhead Built-In Delay Sensor<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dblp.org\/db\/journals\/tcad\/tcad25.html#journals\/tcad\/GhoshBRR06\">IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.<\/a> (TCAD) 25(12) 2934-2943 (2006).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4014528\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4014528\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TCAD&#8217;06] <\/span><\/strong>Animesh Datta, <strong>Swarup Bhunia<\/strong>, Saibal Mukhopadhyay, and Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">Delay Modeling and Statistical Design of Pipelined Circuit Under Process Variation<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=43\">IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.<\/a> (TCAD) 25(11): 2427-2436 (2006).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1715427\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1715427\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TCAD&#8217;06] <\/span><\/strong>Saibal Mukhopadhyay, <strong>Swarup Bhunia<\/strong>, and Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">Modeling and analysis of loading effect on leakage of nanoscaled bulk-CMOS logic circuits<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dblp.org\/db\/journals\/tcad\/tcad25.html#journals\/tcad\/MukhopadhyayBR06\">IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.<\/a> (TCAD) 25(8): 1486-1495 (2006).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1637738\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1637738\">PDF<\/a>]<\/span><\/li>\n<\/ul>\n<h4>2005<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong><span style=\"color: #000080\">[TVLSI&#8217;05] <\/span><\/strong>Arijit Raychowdhury, Bipul Paul, <strong>Swarup Bhunia<\/strong>, and Kaushik Roy, \u201c<span style=\"color: #000080\">Computing with subthreshold leakage: device\/circuit\/architecture co-design for ultralow-power subthreshold operation<\/span>&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=92\">IEEE Trans. Very Large Scale Integr. Syst.<\/a> (TVLSI) 13(11): 1213-1224 (2005).\u00a0<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1564075\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1564075\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TC&#8217;05] <\/span>Swarup Bhunia<\/strong>, Animesh Datta, Nilanjan Banerjee, and Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">GAARP: A Power-Aware GALS Architecture for Real-Time Algorithm-Specific Tasks<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/journal\/itco\">IEEE Trans. Computers<\/a> (TC) 54(6): 752-766 (2005).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1461362\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1461362\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TVLSI&#8217;05] <\/span><\/strong>Qikai Chen, Hamid Mahmoodi, <strong>Swarup Bhunia<\/strong>, and Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">Efficient testing of SRAM with optimized march sequences and a novel DFT technique for emerging failures due to process variations<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=92\">IEEE Trans. Very Large Scale Integr. Syst.<\/a> (TVLSI) 13(11): 1286-1295 (2005).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1564081\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1564081\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TVLSI&#8217;05] <\/span>Swarup Bhunia<\/strong> and Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">A novel wavelet transform-based transient current analysis for fault detection and localization<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=92\">IEEE Trans. Very Large Scale Integr. Syst.<\/a> (TVLSI) 13(4): 503-507 (2005).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1411848\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1411848\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TVLSI&#8217;05] <\/span>Swarup Bhunia<\/strong>, Hamid Mahmoodi, Saibal Mukhopadhyay, Debjyoti Ghosh, and Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">A Novel Low-Power Scan Design Technique Using Supply Gating<\/span>&#8220;.<\/span> <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=92\">IEEE Trans. Very Large Scale Integr. Syst.<\/a> (TVLSI) 13(3) 384-395 (2005).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1406044\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1406044\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[JETTA&#8217;05] <\/span>Swarup Bhunia<\/strong>, Arijit Roychowdhury, and Kaushik Roy, \u201c<span style=\"color: #000080\">Frequency Specification Testing of Analog Filters Using Wavelet Transform of Dynamic Supply Current<\/span>&#8220;. <a href=\"https:\/\/link.springer.com\/journal\/10836\">J. Electron. Test.<\/a> (JETTA): 21, 243\u2013255 (2005).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1283705\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1283705\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[TECS&#8217;05] <\/span><\/strong>Lih-yih Chiou, <strong>Swarup Bhunia<\/strong>, and Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">Synthesis of Application-Specific Highly-Efficient Multi-Mode Systems for Low-Power Applications<\/span>&#8220;.<\/span> <a href=\"https:\/\/dl.acm.org\/toc\/tecs\/2005\/4\/1\">ACM Trans. on Embedded Computing Systems (TECS)<\/a> (TECS): 4(1), 168-188 (2005).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/1053271.1053278\">Abstract<\/a> | <a href=\"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1053271.1053278\">PDF<\/a>]<\/span><\/li>\n<li><strong><span style=\"color: #000080\">[JETTA&#8217;05] <\/span>Swarup Bhunia<\/strong>, Arijit Raychowdhury, and Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">Defect Oriented Testing of Analog Circuits Using Wavelet Analysis of Dynamic Supply Current<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/link.springer.com\/journal\/10836\">J. Electron. Test.<\/a> (JETTA) 21(2): 147-159 (2005).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/article\/10.1007\/s10836-005-6144-3\">Abstract<\/a> | <a href=\"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-content\/uploads\/sites\/689\/2026\/02\/s10836-008-5072-4-1.pdf\">PDF<\/a>]<\/span><\/li>\n<\/ul>\n<h4>2004<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong><span style=\"color: #000080\">[TVLSI&#8217;04] <\/span><\/strong>Hai Li, <strong>Swarup Bhunia<\/strong>, Yiran Chen, Kaushik Roy, and T. N. Vijaykumar, \u201c<span class=\"title\"><span style=\"color: #000080\">DCG: deterministic clock-gating for low-power microprocessor design<\/span>&#8220;.<\/span> <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=92\">IEEE Trans. Very Large Scale Integr. Syst.<\/a> (TVLSI) 12(3): 245-254 (2004).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1281796\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1281796\">PDF<\/a>]<\/span><\/li>\n<\/ul>\n<\/div><div class=\"accordion-btn-wrap\"><\/div><\/div><\/div><\/div><\/div>\n\n\n\n<div class=\"wp-block-create-block-accordion-block-inner\"><div class=\"accordion-item\"><span class=\"accordion-header\" id=\"headingf7c5bd7d-f3b6-4f1d-a101-5dedcea3ea59\"><button class=\"accordion-button collapsed\" type=\"button\" data-bs-toggle=\"collapse\" data-bs-target=\"#collapsef7c5bd7d-f3b6-4f1d-a101-5dedcea3ea59\" aria-expanded=\"false\" aria-controls=\"f7c5bd7d-f3b6-4f1d-a101-5dedcea3ea59\">Conference Publications (Full-Paper Refereed Archival Conferences)<\/button><\/span><div id=\"collapsef7c5bd7d-f3b6-4f1d-a101-5dedcea3ea59\" class=\"accordion-collapse collapse\" aria-labelledby=\"headingf7c5bd7d-f3b6-4f1d-a101-5dedcea3ea59\"><div class=\"accordion-body\"><div class=\"accordion-body-wrap\">\n<h4>2026<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[DAC&#8217;26] <\/strong><\/span>Venkata Nithin Kamineni, <span style=\"text-decoration: underline\">Habibur Rahaman<\/span>, Ovishake Sen, Baibhab Chatterjee, <strong>Swarup Bhunia<\/strong>, and Rickard Ewetz, \u201c<span style=\"color: #000080\">E\u00b3-CODE: Embedded and Efficient Error-Correcting Code for Error-Resilient Neural Networks<\/span>\u201d to appear in <a href=\"https:\/\/dac.com\/2026\">Design Automation Conference<\/a> (DAC) (2026).<\/li>\n<li><span style=\"color: #000080\"><strong>[CVPR&#8217;26] <\/strong><\/span>Abdullah Al Nomaan Nafi, <span style=\"text-decoration: underline\">Habibur Rahaman<\/span>, Zafaryab Haider, Tanzim Mahfuz, Fnu Suya, <strong style=\"font-size: 1.25rem\">Swarup Bhunia<\/strong><span style=\"font-size: 1.25rem\">, and Prabuddha Chakraborty, \u201c<\/span><span style=\"font-size: 1.25rem\" data-olk-copy-source=\"MessageBody\"><span style=\"color: #000080\"><span style=\"color: #000080\">DASH: A Meta-Attack Framework for Synthesizing Effective and Stealthy Adversarial Examples<\/span>&#8220;<\/span><span style=\"font-size: 1.25rem\">\u201d to appear in <\/span><a style=\"font-size: 1.25rem\" href=\"https:\/\/cvpr.thecvf.com\/\">The IEEE\/CVF Conference on Computer Vision and Pattern Recognition<\/a><span style=\"font-size: 1.25rem\">, (CVPR) (2026).<\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[USENIX Security&#8217;26] <\/strong><\/span>Sanskar Amgain, <u>Daniel Lobo<\/u>, <u>Atri Chatterjee<\/u>, <strong>Swarup Bhunia<\/strong>, and Fnu Suya, \u201c<span style=\"color: #000080\">HAMLOCK: HArdware-Model LOgically Combined attack<\/span>\u201d, to appear in <a href=\"https:\/\/www.usenix.org\/conference\/usenixsecurity26\">USENIX Security Symposium<\/a> (USENIX Security) (2026).<\/li>\n<li><span style=\"color: #000080\"><strong>[DATE&#8217;26]<\/strong><\/span> Mahmudul Hasan, <span style=\"text-decoration: underline\">Sudipta Paria<\/span>, <strong>Swarup Bhunia<\/strong>, and Tamzidul Hoque, \u201c<span style=\"color: #000080\">COVERT: Trojan Detection in COTS Hardware via Statistical Activation of Microarchitectural Events<\/span>\u201d to appear in <a href=\"https:\/\/www.date-conference.com\/\">Design, Automation and Test in Europe Conference<\/a> (DATE) (2026).<\/li>\n<li><span style=\"color: #000080\"><strong>[ISQED&#8217;26]<\/strong><\/span> <span style=\"text-decoration: underline\">Atri Chatterjee<\/span>, <span style=\"text-decoration: underline\">Sudipta Paria<\/span>, <span style=\"text-decoration: underline\">Aritra Dasgupta<\/span>, <span style=\"text-decoration: underline\">Habibur Rahaman<\/span>, Baibhab Chatterjee and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">CRISP: Platform-Agnostic Unified Reconfigurable Hardware Security Primitive<\/span>\u201d to appear in The 27<sup>th<\/sup> <a href=\"https:\/\/www.isqed.org\/\">International Symposium on Quality Electronic Design<\/a> (ISQED) (2026).<\/li>\n<li><span style=\"color: #000080\"><strong>[AERA&#8217;26] <\/strong><\/span>Andrea Ramirez-Salgado, Lauren Eutsler, Anany Sharma, Woorin Hwang, Yessy E. Ambarwati, Talar Terzian, Megan Barnes, Nicole Dominguez, Dillon Donihue, <strong>Swarup Bhunia<\/strong>, Tamzidul Hoque, and Pasha Antonenko, \u201c<span style=\"color: #000080\">Engaging teenagers in community-centered edge AI projects<\/span>\u201d to appear in the <a href=\"https:\/\/www.aera.net\/\">American Educational Research Association<\/a> (AERA) (2026).<\/li>\n<li><span style=\"color: #000080\"><strong>[AERA&#8217;26] <\/strong><\/span>Lauren Eutsler, Megan Barnes, Andrea Ramirez-Salgado, Yessy E. Ambarwati, Woorin Hwang, Talar Terzian, Anany Sharma, Tamzidul Hoque, <strong>Swarup Bhunia<\/strong>, and Pasha Antonenko, \u201c<span style=\"color: #000080\">Listening to Teachers: Adapting a Microelectronics and AI Curriculum Through Participatory Design<\/span>\u201d to appear in the <a href=\"https:\/\/www.aera.net\/\">American Educational Research Association<\/a> (AERA) (2026).<\/li>\n<\/ul>\n<h4>2025<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[ICCD&#8217;25] <\/strong><\/span><span style=\"text-decoration: underline\">Sudipta Paria<\/span>, <span style=\"text-decoration: underline\">Aritra Dasgupta<\/span>, <span style=\"text-decoration: underline\">Dinesh R. Ankireddy<\/span>, Prabuddha Chakraborty, and <strong>Swarup Bhunia<\/strong> \u201c<span style=\"color: #000080\">LLM-assisted Scalable Formal Verification<\/span>\u201d. <a href=\"https:\/\/www.iccd-conf.com\/home.html\">IEEE International Conference on Computer Design<\/a> (ICCD) (2025). [In Special Session, GenAI Meets Silicon: LLMs in Hardware Design, Verification, and Security].<\/li>\n<li><span style=\"color: #000080\"><strong>[NeurIPS Education&#8217;25] <\/strong><\/span>Andrea Ramirez-Salgado, Pasha Antonenko, <strong>Swarup Bhunia<\/strong>, Lauren Eutsler, Tamzidul Hoque, \u201c<span style=\"color: #000080\">Reimagining AI Education: Local, Tangible, and Personally Meaningful<\/span>\u201d. <a href=\"https:\/\/neurips.cc\/\">NeurIPS 2025 Education Program<\/a> (NeurIPS Education) (2025).<\/li>\n<li><span style=\"color: #000080\"><strong>[SmartIoT&#8217;25]<\/strong> <\/span>Ankan Ghosh, Sumaiya Afroz Mila, <u>Zongwei Zhen<\/u>, Cong Chen, <strong>Swarup Bhunia<\/strong>, Sandip Ray, \u201c<span style=\"color: #000080\">A Machine Learning Approach for Real-time Gait Analysis<\/span>\u201d. <a href=\"https:\/\/ieee-smartiot.org\/\">9<sup>th<\/sup> IEEE International Conference on Smart Internet of Things<\/a> (SmartIoT) (2025). <span style=\"color: #ff6600\"><strong>[Best Paper Runner-up Award].<\/strong><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[ASEE ACE&#8217;25]<\/strong> <\/span>Andrea Ramirez-Salgado, Pavlo Antonenko, <strong>Swarup Bhunia<\/strong>, Christine Wusylko, Woorin Hwang, Yessy Eka Ambarwati, \u201c<span style=\"color: #000080\">Voices of Hope: A Phenomenological Study on Women\u2019s Self-Efficacy in Computer Engineering<\/span>\u201d. <a href=\"https:\/\/peer.asee.org\/collections\/2025-asee-annual-conference-exposition\">ASEE Annual Conference &amp; Exposition<\/a> (ASEE) (2025).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/nemo.asee.org\/public\/conferences\/365\/papers\/48516\/view\">Abstract<\/a>]<\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[MLCAD&#8217;25] <\/strong><\/span><u>Dinesh R. Ankireddy<\/u>, <u>Sudipta Paria<\/u>, <u>Aritra Dasgupta<\/u>, Sandip Ray, <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">LASSO: LLM-Aided Security Property Generation for Assertion-based SoC Verification<\/span>&#8220;. <a href=\"https:\/\/mlcad.org\/symposium\/2025\/\">ACM\/IEEE International Symposium on Machine Learning for CAD<\/a> <\/span>(MLCAD): 1-10 (2025). <strong><span style=\"color: #ff6600\">[Best Paper Nomination].<br \/><\/span><\/strong><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/11189178\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=11189178\">PDF<\/a>]<\/span><\/span><strong><span style=\"color: #ff6600\"><br \/><\/span><\/strong><\/li>\n<li><span style=\"color: #000080\"><strong>[ICCAD&#8217;25] <\/strong><\/span>Raghul Saravanan, <u>Sudipta Paria<\/u>, <u>Aritra Dasgupta<\/u>, <strong>Swarup Bhunia<\/strong>, Sai Manoj Pudukotai Dinakarrao, \u201c<span class=\"title\"><span class=\"title\"><span style=\"color: #000080\">PROFUZZ: Directed Graybox Fuzzing via Module Selection and ATPG-Guided Seed Generation<\/span>&#8220;. <a href=\"https:\/\/2025.iccad.com\/\">IEEE\/ACM International Conference on Computer-Aided Design<\/a> (ICCAD)<\/span><\/span>: 1-9 (2025).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/11240782\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=11240782\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"text-decoration: underline\"><span style=\"color: #000080\"><strong>[ITC&#8217;25] <\/strong><\/span>Sudipta Paria, Md Rezoan Ferdous, Aritra Dasgupta, Atri Chatterjee<\/span>, <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">LITE: ATPG-Aware Lightweight Scan Instrumentation for Enhancing Test Efficiency<\/span>&#8220;. <a href=\"https:\/\/www.itctestweek.org\/\">International Test Conference<\/a> (ITC)<\/span>: 339-348 (2025).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/11219768\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?arnumber=11219768\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"text-decoration: underline\"><span style=\"color: #000080\"><strong>[MWSCAS&#8217;25] <\/strong><\/span>Junjun Huan<\/span>, Jacob Pena, <span style=\"text-decoration: underline\">Zongwei Zhen<\/span>, <strong>Swarup Bhunia<\/strong>, and Somyajit Manda, \u201c<span style=\"color: #000080\">A Wearable Ultrasound Device for Scapular Movement Tracking<\/span>\u201d. <a href=\"https:\/\/www.mwscas2025.org\/\">IEEE International Midwest Symposium on Circuits and Systems<\/a> (MWSCAS) (2025).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/11244576\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=11244576\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[DAC&#8217;25] <\/strong><\/span>Tanzim Mahfuz, <u>Sudipta Paria,<\/u> Tasneem Farhana Suha, <strong>Swarup Bhunia<\/strong>, and Prabuddha Chakraborty, \u201c<span class=\"title\"><span style=\"color: #000080\">POLARIS: Explainable Artificial Intelligence for Mitigating Power Side-Channel Leakage<\/span>&#8220;. <a href=\"https:\/\/archive.dac.com\/about\/conference-archive\/62nd-dac-2025.html\">Design Automation Conference<\/a> (DAC)<\/span>: 1-7 (2025).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1109\/DAC63849.2025.11132622\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?arnumber=11132622\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[VTS&#8217;25] <\/strong><\/span><u>Dinesh Reddy Ankireddy, Sudipta Paria<\/u>, <u>Aritra Dasgupta<\/u>, Sandip Ray, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span class=\"title\"><span style=\"color: #000080\">CLIP: A Structural Approach to Cut Points Matching for Logic Equivalence Checking<\/span>&#8220;. <a href=\"https:\/\/tttc-vts.org\/public_html\/new\/2025\/index.html\">IEEE VLSI Test Symposium<\/a> (VTS)<\/span><\/span>: 1-7 (2025).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/11022927\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=11022927\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[VTS&#8217;25] <\/strong><\/span><u>Tanzim Mahfuz, Pravin Gaikwad<\/u>, <strong>Swarup Bhunia<\/strong>, and Prabuddha Chakraborty, \u201c<span class=\"title\"><span style=\"color: #000080\">SALTY: Explainable Artificial Intelligence Guided Structural Analysis for Hardware Trojan Detection<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/tttc-vts.org\/public_html\/new\/2025\/index.html\">IEEE VLSI Test Symposium<\/a> (VTS)<\/span>: 1-7 (2025).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/11022818\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=11022818\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[VTS&#8217;25] <\/strong><\/span><u>Sudipta Paria<\/u>, <u>Aritra Dasgupta<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Towards Automated Verification of IP and COTS: Leveraging LLMs in Pre- and Post-Silicon Stages<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/tttc-vts.org\/public_html\/new\/2025\/index.html\">IEEE VLSI Test Symposium<\/a> (VTS)<\/span>: 1-5 (2025). [LLM Applications in VLSI Testing and Security]<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/11022781\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=11022781\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[AERA&#8217;25] <\/strong><\/span>Andrea Ramirez-Salgado, Pasha Antonenko, Maya Israel, Kara M. Dawson, and <strong>Swarup Bhunia<\/strong>, &#8220;<span style=\"color: #000080\">Advancing Transcendental Phenomenology as a Methodology for Exploring the Needs and Voices of Underrepresented Groups<\/span>&#8220;. <a href=\"https:\/\/www.aera.net\/\">American Educational Research Association<\/a> (AERA) (2025).<\/li>\n<\/ul>\n<h4>2024<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[HOST&#8217;24] <\/strong><\/span><u>Sudipta Paria<\/u>, <u>Aritra Dasgupta<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span class=\"title\"><span style=\"color: #000080\">DiSPEL: A Framework for SoC Security Policy Synthesis and Distributed Enforcement<\/span>&#8220;. <a href=\"http:\/\/www.hostsymposium.org\/host2024\/index2024.php\">IEEE International Workshop on Hardware-Oriented Security and Trust<\/a> (HOST): <\/span><\/span>271-281 (2024).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10545407\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10545407\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[ATS&#8217;24] <\/strong><\/span><u>Habibur Rahaman<\/u>, <u>Atri Chatterjee<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span class=\"title\"><span style=\"color: #000080\">SAMURAI: A Framework for Safeguarding Against Malicious Usage and Resilience of AI<\/span>&#8220;. <a href=\"https:\/\/site.thoracic.org\/events\/ats-2024-international-conference\">Asian Test Symposium<\/a> (ATS):<\/span><\/span> 1-6 (2024).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10915409\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10915409\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[ATS&#8217;24] <\/strong><\/span>Sudipta Paria<\/u>, <u>Aritra Dasgupta<\/u>, and <strong>Swarup Bhunia<\/strong>.&#8221;<span class=\"title\"><span style=\"color: #000080\">LATENT: Leveraging Automated Test Pattern Generation for Hardware Trojan Detection<\/span>&#8220;. <a href=\"https:\/\/site.thoracic.org\/events\/ats-2024-international-conference\">Asian Test Symposium<\/a> (ATS):<\/span> 1-6 (2024).\u00a0<strong><span style=\"color: #ff6600\">[Best Paper Nomination].<br \/><\/span><\/strong><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10915238\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10915238\">PDF<\/a>]<\/span><\/span><strong><span style=\"color: #ff6600\"><br \/><\/span><\/strong><\/li>\n<li><span style=\"color: #000080\"><strong>[ATS&#8217;24] <\/strong><\/span><u>Habibur Rahaman<\/u> and Swarup Bhuinia, \u201c<span class=\"title\"><span style=\"color: #000080\">Secure AI Systems: Emerging Threats and Defense Mechanisms<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/site.thoracic.org\/events\/ats-2024-international-conference\">Asian Test Symposium<\/a> (ATS):<\/span> 1-6 (2024).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10915428\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10915428\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[PAINE&#8217;24] <\/strong><\/span>Moshiur Rahaman, Rasheed Almawzan, Aritra Dasgupta, Sudipta Paria<\/u> and Swarup Bhuinia, \u201c<span style=\"color: #000080\">United We Protect: Protecting IP Confidentiality with Integrated Transformation and Redaction<\/span>\u201d. <a href=\"https:\/\/paine-conference.org\/\">IEEE Physical Assurance and Inspection of Electronics<\/a> (PAINE): (2024).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10792848\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10792848\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[ISVLSI&#8217;24] <\/strong><\/span>Reiner N. Dizon-Paradis<\/u>, <u>Aritra Dasgupta<\/u>, <u>Rohan Reddy Kalavakonda<\/u>, <strong>Swarup Bhunia<\/strong>: &#8220;<span class=\"title\"><span class=\"title\"><span style=\"color: #000080\">Pasteables: A Flexible and Smart &#8220;Stick-and-Peel&#8221; Wearable Platform for Fitness and Athletics<\/span>&#8220;. <a href=\"https:\/\/ieee-isvlsi.github.io\/ISVLSI_2024_Website\/\">IEEE Computer Society Annual Symposium on VLSI<\/a> (ISVLSI):<\/span><\/span> (2024).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10682755\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10682755\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[ISVLSI&#8217;24] <\/strong><\/span>Rasheed Almawzan<\/u>, <u>Sudipta Paria<\/u>, <u>Aritra Dasgupta<\/u>, Kostas Amberiadis, <strong>Swarup Bhunia<\/strong>: &#8220;<span class=\"title\"><span style=\"color: #000080\">IP Security in Structured ASIC: Challenges and Prospects<\/span>&#8220;.<\/span><span class=\"title\"><span class=\"title\"> <a href=\"https:\/\/ieee-isvlsi.github.io\/ISVLSI_2024_Website\/\">IEEE Computer Society Annual Symposium on VLSI<\/a> (ISVLSI): <\/span><\/span>397-402 (2024).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10682775\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10682775\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[ISVLSI&#8217;24] <\/strong><\/span>Aritra Dasgupta, Sudipta Paria, Prabuddha Chakraborty<\/u>, <strong>Swarup Bhunia<\/strong>: &#8220;<span class=\"title\"><span style=\"color: #000080\">Splitting the Secrets: A Cooperative Trust Model for System-on-Chip Designs with Untrusted IPs<\/span>&#8220;.<\/span><span class=\"title\"><span class=\"title\"> <a href=\"https:\/\/ieee-isvlsi.github.io\/ISVLSI_2024_Website\/\">IEEE Computer Society Annual Symposium on VLSI<\/a> (ISVLSI): <\/span><\/span>325-330 (2024).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10682704\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10682704\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[ISVLSI&#8217;24] <\/strong><\/span>Prabuddha Chakraborty<\/u>, <strong>Swarup Bhunia<\/strong>: &#8220;<span class=\"title\"><span style=\"color: #000080\">An Intelligent Memory Framework for Resource Constrained IoT Systems<\/span>&#8220;.<\/span> <span class=\"title\"><span class=\"title\">\u00a0<a href=\"https:\/\/ieee-isvlsi.github.io\/ISVLSI_2024_Website\/\">IEEE Computer Society Annual Symposium on VLSI<\/a> (ISVLSI):<\/span><\/span>\u00a0296-299 (2024).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10682704\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10682736\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[GLSVLSI&#8217;24] <\/strong><\/span>Rasheed Almawzan, Atri Chatterjee, Aritra Dasgupta<\/u>,<strong> Swarup Bhunia<\/strong>, &#8220;<span style=\"color: #000080\">LISA: A Multi-Layered Iterative Framework for Hardening Obfuscation with Modular Unit Transformations<\/span>&#8220;. <a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/3649476\">ACM Great Lakes Symposium on VLSI<\/a> (GLSVLSI):\u00a0588-591 (2024).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10528764\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10528764\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[GLSVLSI&#8217;24] <\/strong><\/span>Sudipta Paria, Aritra Dasgupta<\/u>, <strong>Swarup Bhunia<\/strong>: &#8220;<span class=\"title\"><span style=\"color: #000080\">Navigating SoC Security Landscape on LLM-Guided Paths<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/3649476\">ACM Great Lakes Symposium on VLSI<\/a> (GLSVLSI): 252-257 (2024).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/3649476.3660393\">Abstract<\/a> | <a href=\"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-content\/uploads\/sites\/689\/2026\/02\/3649476.3660393.pdf\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[BIOCAS&#8217;24] <\/strong><\/span>Deepanshu Trivedi, <u>Junjun Huan<\/u>, Arjuna Madanayake, <strong>Swarup Bhunia<\/strong>, Soumyajit Mandal: &#8220;<span class=\"title\"><span style=\"color: #000080\">Compressed Plane-Wave Compounding for Efficient Imaging on Portable Ultrasound Devices<\/span>&#8220;. <a href=\"https:\/\/2024.ieee-biocas.org\/\">IEEE Biomedical Circuits and Systems Conference<\/a> (BioCAS):<\/span>\u00a01-5 (2024).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10798366\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10798366\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2023<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[SOCC&#8217;23] <\/strong><\/span>Prabuddha Chakraborty, Tasneem Suha, <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Hardware Specification Aware Timing Side Channel Security Analysis<\/span>&#8220;. <a href=\"https:\/\/acmsocc.org\/2023\/\">ACM Symposium on Cloud Computing<\/a> (SOCC):<\/span> 1-6 (2023).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10256749\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10256749\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[IJCNN&#8217;23] <\/strong><\/span>Krishnendu Guha, Amit Ranjan Trivedi, <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Energy Efficient Memory-based Inference of LSTM by Exploiting FPGA Overlay<\/span>&#8220;. <a href=\"https:\/\/2023.ijcnn.org\/\">International Joint Conference on Neural Networks<\/a> (IJCNN):<\/span>\u00a01-7 (2023).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10191667\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10191667\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2022<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[AICAS&#8217;22] <\/strong><\/span>Ahish Shylendra, Priyesh Shukla, <strong>Swarup Bhunia<\/strong>, Amit Ranjan Trivedi: &#8220;<span class=\"title\"><span class=\"title\"><span style=\"color: #000080\">Analog-Domain Time-Series Moment Extraction for Low Power Predictive Maintenance Analytics<\/span>&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/9869844\/proceeding\">IEEE International Conference on Artificial Intelligence Circuits and Systems<\/a> (AICAS):<\/span><\/span>\u00a09-12 (2022).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9869914\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9869914\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[ASIANHOST&#8217;22] <\/strong><\/span><u>Jonathan Cruz, Pravin Gaikwad<\/u>, <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span class=\"title\"><span style=\"color: #000080\">Analysis of Hardware Trojan Resilience Enabled through Logic Locking<\/span>&#8220;. <a href=\"https:\/\/www.asianhost.org\/2022\/\">Asian Hardware Oriented Security and Trust Symposium<\/a> (AsianHOST): <\/span><\/span>1-6 (2022).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10022237\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10022237\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[ASIANHOST&#8217;22<\/strong><\/span><u><span style=\"color: #000080\"><strong>] <\/strong><\/span>Jonathan Cruz, Pravin Gaikwad, Abhishek Nair, Prabuddha Chakraborty<\/u>, <strong>Swarup Bhunia<\/strong>: &#8220;<span class=\"title\"><span style=\"color: #000080\">A Machine Learning Based Automatic Hardware Trojan Attack Space Exploration and Benchmarking Framework<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/www.asianhost.org\/2022\/\">Asian Hardware Oriented Security and Trust Symposium<\/a> (AsianHOST):<\/span>\u00a01-6 (2022).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10022234\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?arnumber=10022234\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[ASPDAC&#8217;22] <\/strong><\/span>Lakshmy, Chester Rebeiro, <strong>Swarup Bhunia<\/strong>: &#8220;<span class=\"title\"><span class=\"title\"><span style=\"color: #000080\">FORTIFY: Analytical Pre-Silicon Side-Channel Characterization of Digital Designs<\/span>&#8220;. <a href=\"https:\/\/www.aspdac.com\/aspdac2022\/\">Asia and South Pacific Design Automation Conference<\/a><\/span><\/span><span class=\"title\"><span class=\"title\"> (ASP-DAC):<\/span><\/span>\u00a0660-665 (2022).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9712551\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9712551\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[DAC&#8217;22] <\/strong><\/span><u>Aritra Bhattacharyay, Prabuddha Chakraborty, Jonathan Cruz<\/u>, <strong>Swarup Bhunia<\/strong>: &#8220;<span class=\"title\"><span style=\"color: #000080\">VIPR-PCB: a machine learning based golden-free PCB assurance framework<\/span>&#8220;. <\/span><a href=\"https:\/\/www.moscone.com\/events\/design-automation-conference-2022\">Design Automation Conference<\/a> (DAC): 793-798 (2022).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/3489517.3530545\">Abstract<\/a> | <a href=\"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-content\/uploads\/sites\/689\/2026\/02\/3489517.3530545.pdf\">PDF<\/a>]<\/span><\/span><\/li>\n<li><strong><span style=\"color: #000080\">[ICCAD&#8217;22] <\/span>Swarup Bhunia<\/strong>, Amitabh Das, Saverio Fazzari, Vivian Kammler, David Kehlet, Jeyavijayan Rajendran, Ankur Srivastava: &#8220;<span class=\"title\"><span style=\"color: #000080\">Hardware IP Protection against Confidentiality Attacks and Evolving Role of CAD Tool<\/span>&#8220;. <a href=\"https:\/\/2022.iccad.com\/index.html\">IEEE\/ACM International Conference on Computer-Aided Design<\/a> (ICCAD):<\/span>\u00a025:1-25:8 (2022).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10069143\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10069143\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[ITC&#8217;22] <\/strong><\/span><u>Prabuddha Chakraborty<\/u>, <strong>Swarup Bhunia<\/strong>: &#8220;<span class=\"title\"><span style=\"color: #000080\">AI-Driven Assurance of Hardware IP against Reverse Engineering Attacks<\/span>&#8220;. <a href=\"https:\/\/www.itctestweek.org\/itc-2022-retrospective-2\/\">International Test Conference<\/a> (ITC):<\/span>\u00a0627-636 (2022).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9983908\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9983908\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[SMARTIOT&#8217;22] <\/strong><\/span><u>Reiner N. Dizon-Paradis, Oliver Ferrigno, Ishamor Reid<\/u>, <strong>Swarup Bhunia<\/strong>: &#8220;<span class=\"title\"><span style=\"color: #000080\">Light Pollution Monitoring Using A Modular IoT Sensor Platform<\/span>&#8220;. <a href=\"https:\/\/ieee-smartiot.org\/SmartIoT2022\/index.jsp\">IEEE International Conference on Smart Internet of Things<\/a> (SmartIoT): <\/span>28-35 (2022).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9874602\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9874602\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[VLSID&#8217;22] <\/strong><\/span><u>Abdulrahman Alaql, Aritra Dasgupta, Md Moshiur Rahman<\/u>, <strong>Swarup Bhunia<\/strong>: &#8220;<span class=\"title\"><span class=\"title\"><span style=\"color: #000080\">SEVA: Structural Analysis based Security Evaluation of Sequential Locking<\/span>&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/9885796\/proceeding\">International Conference on VLSI Design<\/a> (VLSID)<\/span><\/span>: 126-131 (2022).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9885990\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9885990\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2021<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[AsianHOST&#8217;21] <\/strong><\/span>Kshitij Raj, Arrush Hegde, <u>Atul Prasad Deb Nath<\/u>, <strong>Swarup Bhunia<\/strong>, Sandip Ray: &#8220;<span class=\"title\"><span style=\"color: #000080\">SSEL: An Extensible Specification Language for SoC Security<\/span>&#8220;. <a href=\"https:\/\/www.asianhost.org\/2021\/\">Asian Hardware Oriented Security and Trust Symposium<\/a> (AsianHOST)<\/span>: 1-6 (2021).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9699640\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9699640\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[DATE&#8217;21] <\/strong><\/span>Sandip Ray, <u>Atul Prasad Deb Nath<\/u>, Kshitij Raj, <strong>Swarup Bhunia<\/strong>: &#8220;<span class=\"title\"><span style=\"color: #000080\">CASTLE: Architecting Assured System-on-Chip Firmware Integrity<\/span>&#8220;. <\/span><a href=\"https:\/\/date21.date-conference.com\/\">Design, Automation and Test in Europe Conference<\/a> (DATE): 1781-1786 (2021).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9474099\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9474099\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[GLSVLSI&#8217;21] <\/strong><\/span>Sandip Ray, <u>Atul Prasad Deb Nath<\/u>, Kshitij Raj, <strong>Swarup Bhunia<\/strong>: &#8220;<span class=\"title\"><span style=\"color: #000080\">The Curious Case of Trusted IC Provisioning in Untrusted Testing Facilities<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/3453688\">ACM Great Lakes Symposium on VLSI<\/a> (GLSVLSI): 207-212 (2021).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/3453688.3461758\">Abstract<\/a> | <a href=\"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-content\/uploads\/sites\/689\/2026\/02\/3453688.3461758.pdf\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[ISQED&#8217;21] <\/strong><\/span><u>Shuo Yang, Prabuddha Chakraborty<\/u>, Patanjali SLPSK, <strong>Swarup Bhunia<\/strong>: &#8220;<span class=\"title\"><span style=\"color: #000080\">Trusted Electronic Systems with Untrusted COTS<\/span>&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/9424228\/proceeding\">International Symposium on Quality Electronic Design<\/a> (ISQED) <\/span>:198-203 (2021).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9424257\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9424257\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[ISQED&#8217;21] <\/strong><\/span><u>Abdulrahman Alaql<\/u>, <u>Xinmu Wang<\/u>, <u>Md Moshiur Rahman<\/u>, <strong>Swarup Bhunia<\/strong>: &#8220;<span class=\"title\"><span style=\"color: #000080\">SOMA: Security Evaluation of Obfuscation Methods via Attack Sequencing<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/9424228\/proceeding\">International Symposium on Quality Electronic Design<\/a> (ISQED)<\/span>: 381-386 (2021).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9424348\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9424348\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[MWSCAS&#8217;21] <\/strong><\/span><u>Naren Vikram Raj Masna<\/u>, <u>Rohan Reddy Kalavakonda<\/u>, <u>Reiner Dizon<\/u>, <strong>Swarup Bhunia<\/strong>: &#8220;<span class=\"title\"><span style=\"color: #000080\">Smart and Connected Mask for Protection beyond the Pandemic<\/span>&#8220;. <\/span><a href=\"https:\/\/www.mwscas2025.org\/\">IEEE International Midwest Symposium on Circuits and Systems<\/a> (MWSCAS): 676-679 (2021).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9531802\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9531802\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2020<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[VTC&#8217;20] <\/strong><\/span><u>Prabuddha Chakraborty<\/u>, <u>Robert C Parker<\/u>, <u>Jonathan Cruz<\/u>, <u>Tamzidul Hoque<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">P2C2: Peer-to-Peer Car Charging<\/span>&#8220;. <a href=\"https:\/\/www.ieeevtc.org\/vtc2020spring\/tutorials.php\">IEEE Vehicular Technology Conference<\/a> (VTC): <\/span>1-5 (2020).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9128955\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9128955\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[DATE&#8217;20] <\/strong><\/span>Milind Srivastava, Patanjali SLPSK, Indrani Roy, Chester Rebeiro, Aritra Hazra, <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">SOLOMON: An Automated Framework for Detecting Fault Attack Vulnerabilities in Hardware<\/span>&#8220;. <a href=\"https:\/\/date20.date-conference.com\/\">Design, Automation and Test in Europe Conference<\/a><\/span> (DATE): 310-313 (2020).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9116380\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9116380\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[GLSVLSI&#8217;20] <\/strong><\/span><u>Tamzidul Hoque<\/u>, Patanjali SLPSK, <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">Trust Issues in COTS: The Challenges and Emerging Solution<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/3386263\">ACM Great Lakes Symposium on VLSI<\/a> (GLSVLSI): 211-216 (2020).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/3386263.3407654\">Abstract<\/a> | <a href=\"https:\/\/dl.acm.org\/doi\/epdf\/10.1145\/3386263.3407654\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[ISQED&#8217;20] <\/strong><\/span>Ahish Shylendra, Priyesh Shukla, <strong>Swarup Bhunia<\/strong>, and Amit Ranjan Trivedi, \u201c<span class=\"title\"><span style=\"color: #000080\">Fault Attack Detection in AES by Monitoring Power Side-Channel Statistics<\/span>&#8220;. <a href=\"https:\/\/www.isqed.org\/English\/Archives\/2020\/index.html\">International Symposium on Quality Electronic Design<\/a> (ISQED)<\/span>\u00a0219-224 (2020).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9136981\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9136981\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2019<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[ASIANHOST&#8217;19] <\/strong><\/span><u>Abdulrahman Alaql<\/u>, Domenic Forte, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Sweep to the Secret: A Constant Propagation Attack on Logic Locking<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/www.asianhost.org\/2019\/\">Asian Hardware Oriented Security and Trust Symposium<\/a> (AsianHOST)<\/span>\u00a01-6 (2019).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9006720\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9006720\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[ICCAD&#8217;19] <\/strong><\/span>Jungmin Park, JP Park, <strong>Swarup Bhunia<\/strong>, Alex Cho, and Mark Tehranipoor, \u201c<span class=\"title\"><span style=\"color: #000080\">SCR-QRNG: Side-Channel Resistant Design using Quantum Random Number Generator<\/span>&#8220;. <a href=\"https:\/\/www.iccad-conf.com\/iccad2019\/index.html\">IEEE\/ACM International Conference on Computer-Aided Design<\/a> (ICCAD)<\/span>\u00a01-8 (2019).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8942152\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=8942152\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[NAECON&#8217;19] <\/strong><\/span>Nicholas Olexa, <strong>Swarup Bhunia<\/strong>, Soumyajit Mandal, and Rashmi Jha, \u201c<span style=\"color: #000080\">ReRAM-Based Intrinsically Secure Memory: A Feasibility Analysis<\/span>\u201d. <a href=\"https:\/\/attend.ieee.org\/naecon-2019\/\">National Aerospcae and Electronics Conference<\/a> (NAECON): 218-225 (2019).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9057901\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9057901\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>HOST&#8217;19] <\/strong><\/span><u>Prabuddha Chakraborty<\/u>, <u>Jonathan Cruz<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">SURF: Joint Structural Functional Attack on Logic Locking<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"http:\/\/www.hostsymposium.org\/host2019\/index2019.php\">IEEE International Workshop on Hardware-Oriented Security and Trust<\/a> (HOST)<\/span>: 181-190 (2019).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8741028\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=8741028\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>VTS&#8217;19] <\/strong><\/span><u>Abdulrahman Alaql, Tamzidul Hoque, Domenic Forte,<\/u> <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Quality Obfuscation for Error-Tolerant and Adaptive Hardware IP Protection<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/tttc-vts.org\/public_html\/new\/2019\/home\/\">IEEE VLSI Test Symposium<\/a> (VTS)<\/span>: 1-6 (2019).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8758637\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=8758637\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2018<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ASIANHOST&#8217;18] <\/strong><\/span><u>Prabuddha Chakraborty<\/u>, <u>Jonathan Cruz<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">SAIL: Machine Learning Guided Structural Analysis Attack on Hardware Obfuscation<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/www.asianhost.org\/2018\/\">Asian Hardware Oriented Security and Trust Symposium<\/a> (AsianHOST)<\/span>: 56-61 (2018).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8607163\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=8607163\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ITC&#8217;18] <\/strong><\/span><u>Tamzidul Hoque<\/u>, <u>Jonathan Cruz<\/u>, <u>Prabuddha Chakraborty<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Hardware IP Trust Validation: Learn (the Untrustworthy) and Verify<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/www.cadence.com\/en_US\/home\/company\/events\/industry-events\/itc-2018.html\">International Test Conference<\/a> (ITC)<\/span>: 1-10 (2018)<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8624727\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=8624727\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ISTFA&#8217;18] <\/strong><\/span>Haoting Shen, M Tanjidur Rahman, Navid Asadizanjan, Mark Tehranipoor, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Coating-Based PCB Protection against Tampering, Snooping, EM Attack, and X-ray Reverse Engineering<\/span>\u201d. \u00a0<a style=\"font-size: 1.25rem\" href=\"https:\/\/dl.asminternational.org\/istfa\/ISTFA2018\/volume\/81009\">44th International Symposium for Testing and Failure Analysis<\/a><span style=\"font-size: 1.25rem\"> (ISTFA): 290-294 (2018).<\/span><br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.asminternational.org\/istfa\/proceedings-abstract\/ISTFA2018\/81009\/290\/12314?redirectedFrom=PDF\">Abstract]<\/a><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ISLPED&#8217;18] <\/strong><\/span>Ahish Shylendra, <strong>Swarup Bhunia<\/strong>, and Amit Ranjan Trivedi, \u201c<span class=\"title\"><span class=\"title\"><span style=\"color: #000080\">Intrinsic and Database-free Watermarking in ICs by Exploiting Process and Design Dependent Variability in Metal-Oxide-Metal Capacitances<\/span>&#8220;. <a href=\"https:\/\/islped.org\/2018\/\">IEEE\/ACM International Symposium on Low Power Electronics and Design <\/a>(ISLPED)<\/span><\/span>: 44:1-44:6 (2018).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/3218603.3218608\">Abstract<\/a> | <a href=\"https:\/\/dl.acm.org\/doi\/epdf\/10.1145\/3218603.3218608\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[ISVLSI&#8217;18] <\/strong><\/span><u>Atul Prasad Debnath<\/u>, <strong>Swarup Bhunia<\/strong>, and Sandip Ray, \u201c<span class=\"title\"><span style=\"color: #000080\">ArtiFact: Architecture and CAD Flow for Efficient Formal Verification of SoC Security Policies<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/8428827\/proceeding\">IEEE Computer Society Annual Symposium on VLSI<\/a> (ISVLSI)<\/span>: 411-416 (2018).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8429402\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=8429402\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[ISVLSI&#8217;18] <\/strong><\/span><u>Kai Yang<\/u>, Jungmin Park, Mark Tehranipoor, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Robust Timing Attack Countermeasure on Virtual Hardware<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/8428827\/proceeding\">IEEE Computer Society Annual Symposium on VLSI<\/a> (ISVLSI)<\/span>: 148-153 (2018).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8429357\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=8429357\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[HILTON-HEAD&#8217;18] <\/strong><\/span>Mehrdad Ramezani, <u>Angela Newsome<\/u>, Mayur Ghatge, <span style=\"text-decoration: underline\">Fengchao Zhang<\/span>, <strong>Swarup Bhunia<\/strong>, and Roozbeh Tabrizian, \u201c<span style=\"color: #000080\">A Nanomechanical Identification Tag Technology for Traceability and Authentication Applications<\/span>\u201d. <a href=\"https:\/\/www.transducer-research-foundation.org\/archive\/hh2018\/\">Hilton Head 2018 Solid-State Sensors, Actuators &amp; Microsystems Workshop<\/a> (HILTON-HEAD): 206-209 (2018).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/engineering.purdue.edu\/oxidemems\/conferences\/hh2018\/PDFs\/Papers\/hh2018_0206.pdf\">Abstract<\/a> | <a href=\"https:\/\/engineering.purdue.edu\/oxidemems\/conferences\/hh2018\/PDFs\/Papers\/hh2018_0206.pdf\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[HOST&#8217;18] <\/strong><\/span><u>Kai Yang<\/u>, Jungmin Park, Mark Tehranipoor, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Hardware virtualization for protection against power analysis attack<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"http:\/\/www.hostsymposium.org\/host2018\/index2018.php\">IEEE International Workshop on Hardware-Oriented Security and Trust<\/a> (HOST)<\/span>: 167-172 (2018).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8383908\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=8383908\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[VTS&#8217;18] <\/strong><\/span><u>Tamzidul Hoque<\/u>, <u>Xinmu Wang<\/u>, <u>Abhishek Basak<\/u>, <u>Robert Karam<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Hardware Trojan Attack in Embedded Memory<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/tttc-vts.org\/public_html\/new\/2018\/home\/\">IEEE VLSI Test Symposium<\/a> (VTS)<\/span>: 1-6 (2018).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8368630\/\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=8368630\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[NEMS&#8217;18] <\/strong><\/span><u>Angela Newsome<\/u>, Mehrdad Ramezani, Mayur Ghatge, <u>Fengchao Zhang<\/u>, <strong>Swarup Bhunia<\/strong>, and Roozbeh Tabrizian, \u201c<span class=\"title\"><span style=\"color: #000080\">Multi-Mode Micromechanical Resonant Tags for Traceability and Authentication Applications<\/span>&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/8540837\/proceeding\">IEEE International Conference on Nano\/Micro Engineered and Molecular Systems<\/a> (NEMS)<\/span>: 275-279 (2018).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8556909\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=8556909\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[DATE&#8217;18] <\/strong><\/span><u>Jonathan Cruz<\/u>, Yuanwen Huang, Prabhat Mishra, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">An automated configurable Trojan insertion framework for dynamic trust benchmarks<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/past.date-conference.com\/date18\/\">Design, Automation and Test in Europe Conference<\/a><\/span> (DATE) 1598-1603 (2018).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8342270\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=8342270\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[ASPDAC&#8217;18] <\/strong><\/span>Sandip Ray, <u>Atul Prasad Deb Nath<\/u>, <u>Abhishek Basak<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">System-on-chip security architecture and CAD framework for hardware patch<\/span>&#8220;.<\/span> <span class=\"title\"><span class=\"title\"><a href=\"https:\/\/www.aspdac.com\/aspdac2018\/\">Asia and South Pacific Design Automation Conference<\/a><\/span><\/span><span class=\"title\"><span class=\"title\"> (ASP-DAC)<\/span><\/span>: 733-738 (2018).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8297409\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=8297409\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2017<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[BIOCAS&#8217;17] <\/strong><\/span><u>Fengchao Zhang<\/u>, <u>Naren Masna<\/u>, Cheng Chen, Soumyajit Mandal, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Authentication and traceability of food products through the supply chain using NQR spectroscopy<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/2017.ieee-biocas.org\/\">IEEE Biomedical Circuits and Systems Conference<\/a> (BioCAS)<\/span>: 1-4 (2017).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8325173\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=8325173\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[ASIANHOST&#8217;17] <\/strong><\/span><u>Robert Karam<\/u>, <u>Tamzidul Hoque<\/u>, Kevin Butler, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Mixed-granular architectural diversity for device security in the Internet of Things<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/www.asianhost.org\/2017\/\">Asian Hardware Oriented Security and Trust Symposium<\/a> (AsianHOST)<\/span>: 73-78 (2017).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8353998\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=8353998\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>MWSCAS&#8217;17] <\/strong><\/span>Jungmin Park, Massimiliano Corba, Antonio E. de la Serna, Richard L. Vigeant, Mark Tehranipoor, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">ATAVE: A framework for automatic timing attack vulnerability evaluation<\/span>&#8220;. <\/span><a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/8039346\/proceeding\">IEEE International Midwest Symposium on Circuits and Systems<\/a> (MWSCAS): 559-562 (2017).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8052984\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=8052984\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[MWSCAS&#8217;17] <\/strong><\/span><u>Kai Yang<\/u>, <u>Robert Karam<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Interleaved logic-in-memory architecture for energy-efficient fine-grained data processing<\/span>&#8220;.<\/span> <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/8039346\/proceeding\">IEEE International Midwest Symposium on Circuits and Systems<\/a> (MWSCAS): 409-412 (2017).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8052947\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=8052947\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[MWSCAS&#8217;17] <\/strong><\/span>Tonmoy Dhar, <strong>Swarup Bhunia<\/strong>, and Amit Trivedi, \u201c<span class=\"title\"><span style=\"color: #000080\">A solitary protection measure against scan chain, fault injection, and power analysis attacks on AES<\/span>&#8220;.<\/span> <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/8039346\/proceeding\">IEEE International Midwest Symposium on Circuits and Systems<\/a> (MWSCAS): 575-578 (2017).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8052988\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=8052988\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[ASPDAC&#8217;17] <\/strong><\/span>Gustavo K. Contreras, Adib Nahiyan, <strong>Swarup Bhunia<\/strong>, Domenic Forte, Mark Tehranipoor, &#8220;<span class=\"title\"><span style=\"color: #000080\">Security vulnerability analysis of design-for-test exploits for asset protection in SoCs<\/span>&#8220;.<\/span> <span class=\"title\"><span class=\"title\"><a href=\"https:\/\/www.aspdac.com\/aspdac2017\/\">Asia and South Pacific Design Automation Conference<\/a><\/span><\/span><span class=\"title\"><span class=\"title\"> (ASP-DAC)<\/span><\/span>: 617-622 (2017).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7858392\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7858392\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[ASPDAC&#8217;17] <\/strong><\/span><u>Robert Karam<\/u>, <u>Tamzidul Hoque<\/u>, Sandip Ray, Mark Tehranipoor, and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">MUTARCH: Architectural diversity for FPGA device and IP security<\/span>&#8220;.<\/span> <span class=\"title\"><span class=\"title\"><a href=\"https:\/\/www.aspdac.com\/aspdac2017\/\">Asia and South Pacific Design Automation Conference<\/a><\/span><\/span><span class=\"title\"><span class=\"title\"> (ASP-DAC)<\/span><\/span>: 611-616 (2017).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7858391\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7858391\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2016<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[CCS&#8217;16] <\/strong><\/span>Yuanwen Huang, <strong>Swarup Bhunia,<\/strong> and Prabhat Mishra, \u201c<span class=\"title\"><span style=\"color: #000080\">MERS: Statistical Test Generation for Side-Channel Analysis based Trojan Detection<\/span>&#8220;.<\/span> <a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/2976749\">ACM Conference on Computer and Communications Security<\/a> (CCS): 130-141 (2016).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/2976749.2978396\">Abstract<\/a> | <a href=\"https:\/\/dl.acm.org\/doi\/epdf\/10.1145\/2976749.2978396\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[RECONFIG&#8217;16] <\/strong><\/span><u>Robert Karam<\/u>, <u>Tamzidul Hoque<\/u>, Sandip Ray, Mark Tehranipoor and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Robust bitstream protection in FPGA-based systems through low-overhead obfuscation<\/span>&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/7838017\/proceeding\">International Conference on Reconfigurable Computing and FPGAS<\/a> (ReConFig)<\/span>: 1-8 (2016).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7857187\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7857187\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[BIOCAS&#8217;16] <\/strong><\/span><u>Robert Karam<\/u>, Steve Majerus, Dennis Bourbeau, Margot Damaser, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Ultralow-power data compression for implantable bladder pressure monitor: Algorithm and hardware implementation<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/7803480\/proceeding\">IEEE Biomedical Circuits and Systems Conference<\/a> (BioCAS)<\/span>: 500-503 (2016).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7833841\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7833841\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[HI-POCT&#8217;16] <\/strong><\/span><u>Sumaiya Shomaji<\/u>, <u>Abhishek Basak<\/u>, Soumyajit Mandal, <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">A Wearable Carotid Ultrasound Assembly for Early Detection of Cardiovascular Diseases<\/span>\u201d. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/7787015\/proceeding\">IEEE Healthcare Innovation Point-of- Care Technologies<\/a> (HI-POCT): 17-20 (2016).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7797686\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7797686\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[ISTFA&#8217;16] <\/strong><\/span>Zimu Guo, Bicky Shakya, Haoting Shen, <strong>Swarup Bhunia<\/strong>, Navid Asadizanjani, Domenic Forte, Mark Tehranipoor<u>,<\/u> \u201c<span style=\"color: #000080\">A New Methodology to Protect PCBs from Non-destructive Reverse Engineering<\/span>\u201d. <a href=\"https:\/\/dl.asminternational.org\/istfa\/ISTFA2016\/volume\/81368\">International Symposium for Testing and Failure Analysis<\/a> (ISTFA): 347-356 (2016).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.asminternational.org\/istfa\/proceedings-abstract\/ISTFA2016\/81368\/347\/12096\">Abstract<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[ICCAD&#8217;16] <\/strong><\/span>Dylan Ismari, Charles Lamech, <strong>Swarup Bhunia<\/strong>, Fareena Saqib, and James Plusquellic, \u201c<span class=\"title\"><span style=\"color: #000080\">On detecting delay anomalies introduced by hardware trojans<\/span>&#8220;. <a href=\"https:\/\/iccad.com\/2026\/events\/iccad-2016\">IEEE\/ACM International Conference on Computer-Aided Design<\/a> (ICCAD)<\/span>: 1-7 (2016).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7827621\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7827621\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[EMBC&#8217;16] <\/strong><\/span><u>Robert Karam<\/u>, <strong>Swarup Bhunia<\/strong>, Steve Majerus, Steven Brose, Margot S. Damaser, Dennis Bourbeau, \u201c<span class=\"title\"><span style=\"color: #000080\">Real-time, autonomous bladder event classification and closed-loop control from single-channel pressure data<\/span>&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/7580725\/proceeding\">Annual International Conference of the IEEE Engineering in Medicine and Biology Society<\/a> (EMBC)<\/span>: 5789-5792 (2016).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7592043\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7592043\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[DAC&#8217;16] <\/strong><\/span><u>Abhishek Basak<\/u>, <strong>Swarup Bhunia<\/strong>, and Sandip Ray, \u201c<span class=\"title\"><span style=\"color: #000080\">Exploiting design-for-debug for flexible SoC security architecture<\/span>&#8220;. <\/span><a href=\"http:\/\/www.findresearch.org\/conferences\/conf\/dac\/2016\/conference.html\">Design Automation Conference<\/a> (DAC): 167:1-167:6 (2016).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7544408\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7544408\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[ISQED&#8217;16] <\/strong><\/span><u>Steven Paley<\/u>, <u>Tamzidul Hoque<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Active protection against PCB physical tampering<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/www.isqed.org\/English\/Archives\/2016\/index.html\">International Symposium on Quality Electronic Design<\/a> (ISQED)<\/span>: 356-361 (2016).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7479227\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7479227\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[DATE&#8217;16] <\/strong><\/span><u>Fengchao Zhang<\/u>, James Plusquellic, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Current based PUF exploiting random variations in SRAM cells<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/past.date-conference.com\/date16\/\">Design, Automation and Test in Europe Conference<\/a><\/span> (DATE): 277-280 (2016).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7459321\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7459321\">PDF<\/a>]<\/span><\/span><span style=\"color: #ff6600\"><span style=\"color: #000080\"><br \/><\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[ASPDAC&#8217;16] <\/strong><\/span><u>Andrew Hennessy<\/u>, <u>Yu Zheng<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">JTAG-based robust PCB authentication for protection against counterfeiting attacks<\/span>&#8220;.<\/span> <span class=\"title\"><span class=\"title\"><a href=\"https:\/\/www.aspdac.com\/aspdac2016\/\">Asia and South Pacific Design Automation Conference<\/a><\/span><\/span><span class=\"title\"><span class=\"title\"> (ASP-DAC)<\/span><\/span>: 56-61\u00a0 (2016).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7427989\/\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7427989\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2015<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[ITC&#8217;15] <\/strong><\/span><u>Abhishek Basak<\/u>, <u>Fengchao Zhang<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">PiRA: IC authentication utilizing intrinsic variations in pin resistance<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/7331771\/proceeding\">International Test Conference<\/a> (ITC)<\/span>: 1-8 (2015).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7342388\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7342388\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[ICCAD&#8217;15] <\/strong><\/span><u>Abhishek Basak, Sandip Ray<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">A Flexible Architecture for Systematic Implementation of SoC Security Policies<\/span>&#8220;. <a href=\"https:\/\/iccad.com\/2026\/events\/iccad-2015\">IEEE\/ACM International Conference on Computer-Aided Design<\/a> (ICCAD)<\/span>: 536-543 (2015).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7372616\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7372616\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[DAC&#8217;15] <\/strong><\/span>Jae-Won Jang, Jongsun Park, Swaroop Ghosh, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Self-correcting STTRAM under magnetic field attacks<\/span>&#8220;. <\/span><a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/2744769\">Design Automation Conference<\/a> (DAC): 77:1-77:6 (2015).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7167261\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7167261\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[VTS&#8217;15] <\/strong><\/span><u>Andrew Hennessy<\/u>, <u>Fengchao Zhang<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Robust counterfeit PCB detection exploiting intrinsic trace impedance variations<\/span>\u201d. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/7104933\/proceeding\">33rd IEEE VLSI Test Symposium<\/a> (VTS): 1-6 (2015).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7116294\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7116294\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2014<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[DAC&#8217;14] <\/strong><\/span><u>Yu Zheng<\/u>, <u>Abhishek Basak<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">CACI: Dynamic Current Analysis Towards Robust Recycled Chip Identification<\/span>&#8220;. <\/span><a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/2593069\">Design Automation Conference<\/a> (DAC): 88:1-88:6 (2014).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6881415\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6881415\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[ICCAD&#8217;14] <\/strong><\/span>Wenjie Che, <strong>Swarup Bhunia<\/strong> and Jim Plusquellic, \u201c<span class=\"title\"><span style=\"color: #000080\">A non-volatile memory based physically unclonable function without helper data<\/span>&#8220;. <a href=\"https:\/\/iccad.com\/2026\/events\/iccad-2014\">IEEE\/ACM International Conference on Computer-Aided Design<\/a> (ICCAD)<\/span>: 148-153 (2014).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7001345\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7001345\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[VTS&#8217;14] <\/strong><\/span><u>Abhishek Basak<\/u>, <u>Yu Zheng,<\/u> and<u> <strong>Swarup Bhunia<\/strong><\/u>, \u201c<span class=\"title\"><span style=\"color: #000080\">Active defense against counterfeiting attacks through robust antifuse-based on-chip locks<\/span>&#8220;.<\/span> <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/6811042\/proceeding\">IEEE VLSI Test Symposium<\/a> (VTS): 1-6 (2014).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6818793\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6818793\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[GLSVLSI&#8217;14] <\/strong><\/span><u>Wenchao Qian<\/u>, <u>Robert Karam<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Trade-off between energy and quality of service through dynamic operand truncation and fusion<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/2591513\">ACM Great Lakes Symposium on VLSI <\/a>(GLSVLSI): 79-80 (2014).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/2591513.2591561\">Abstract<\/a> | <a href=\"https:\/\/dl.acm.org\/doi\/epdf\/10.1145\/2591513.2591561\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[GLSVLSI&#8217;14] <\/strong><\/span>Sanchita Mal-Sarkar, <u>Aswin Krishna,<\/u> <u>Anandaroop Ghosh<\/u> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Hardware Trojan attacks in FPGA devices: threat analysis and effective counter measures<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/2591513\">ACM Great Lakes Symposium on VLSI<\/a> (GLSVLSI): 287-292 (2014).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/2591513.2591520\">Abstract<\/a> | <a href=\"https:\/\/dl.acm.org\/doi\/epdf\/10.1145\/2591513.2591520\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[NEMS&#8217;14] <\/strong><\/span><u>Vaishnavi Ranganathan<\/u>, Srihari Rajgopal, Mehran Mehregany, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Analysis of practical scaling limits in nanoelectromechanical switches<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/6894723\/proceeding\">IEEE International Conference on Nano\/Micro Engineered and Molecular Systems<\/a> (NEMS)<\/span>: 471-476 (2014).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6908852\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6908852&amp;tag=1\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2013<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[IEDM&#8217;13] <\/strong><\/span>Tina He, <span style=\"text-decoration: underline\">Vaishnavi Ranganathan<\/span>, Rui Yang, Srihari Rajgopal, Mary Anne Tupta, Mehran Mehregany, <strong>Swarup Bhunia<\/strong>, and Philip X.-L. Feng, \u201c<span style=\"color: #000080\">Silicon Carbide (SiC) Nanoelectromechanical Switches and Logic Gates with Long Cycles and Robust Performance in Ambient Air and at High Temperature<\/span>\u201d. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/6709840\/proceeding\">IEEE International Electron Devices Meeting<\/a> (IEDM): 4.6.1-4.6.4 (2013).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6724562\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6724562\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[NANOARCH&#8217;13] <\/strong><\/span>Hadi Hajimiri, Prabhat Mishra, <strong>Swarup Bhunia<\/strong>, Branden Long, Yibo Li, and Rashmi Jha, \u201c<span class=\"title\"><span style=\"color: #000080\">Content-aware encoding for improving energy efficiency in multi-level cell resistive random access memory<\/span>&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/6599038\/proceeding\">IEEE\/ACM International Symposium on Nanoscale Architectures<\/a> (NANOARCH)<\/span>: 76-81 (2013).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6623048\/\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6623048\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[NANOARCH&#8217;13] <\/strong><\/span><u>Vaishnavi Ranganathan<\/u>, Tina He, Srihari Rajgopal, Mehran Mehregany, Philip X.-L. Feng, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Robust Nanomechanical Non-Volatile Memory for Computing at Extreme<\/span>\u201d.\u00a0 <span class=\"title\"><a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/6599038\/proceeding\">9th IEEE\/ACM International Symposium on Nanoscale Architectures<\/a> (NANOARCH): 44-45<\/span> (2013).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6623042\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6623042\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[DAC&#8217;13] <\/strong><\/span><u>Yu Zheng,<\/u> <u>MaryamSadat Hashemian,<\/u> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">RESP: a robust physical unclonable function retrofitted into embedded SRAM array<\/span>&#8220;.<\/span> <a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/2463209\">Design Automation Conference<\/a> (DAC): 60:1-60:9 (2013).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6560653\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6560653\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[DAC&#8217;13] <\/strong><\/span><u>Xinmu Wang<\/u>, Wen Yueh, Debapriya Basu Roy, <u>Yu Zheng<\/u>, <u>Seetharam Narasimhan<\/u>, Saibal Mukhopadhyay, Debdeep Mukhopadhyay, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Role of power grid in side channel attack and power-grid-aware secure design<\/span>&#8220;.<\/span> <a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/2463209\">Design Automation Conference<\/a> (DAC) : 78:1-78:9 (2013).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6560671\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6560671\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[TRANSDUCERS&#8217;13] <\/strong><\/span>Tina He, <span style=\"text-decoration: underline\">Vaishnavi Ranganathan<\/span>, Rui Yang, Srihari Rajgopal, <strong>Swarup Bhunia<\/strong>, Mehran Mehregany, and Philip X.-L. Feng, \u201c<span style=\"color: #000080\">Time-Domain AC Measurement of SiC Nanoelectromechanical Switches toward High Speed Operations<\/span>\u201d. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/6599514\/proceeding\">International Conference on Solid-State Sensors, Actuators and Microsystems<\/a> (Transducers): 669-672 (2013).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6626855\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6626855\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[MRS&#8217;13] <\/strong><\/span>Yibo Li, Wenbo Chen, Ammaarah El-Amin, Rashmi Jha, <strong>Swarup Bhunia<\/strong>, and Philip X.-L. Feng, \u201c<span style=\"color: #000080\">A Reconfigurable Sensing and Computing Platform for Artificial Electronic Skins<\/span>\u201d, <a href=\"https:\/\/www.mrs.org\/meetings-events\/annual-meetings\/archive\/meeting\/2013-mrs-spring-meeting\">MRS Spring Meeting<\/a> (Symposium TT: Materials and Processes for Artificial Skin), (MRS) (2013).<\/li>\n<li><span style=\"color: #000080\"><strong>[NEMS&#8217;13] <\/strong><\/span>Tina He, Rui Yang, Srihari Rajgopal, <strong>Swarup Bhunia<\/strong>, Mehran Mehregany, and Philip X.-L. Feng, \u201c<span class=\"title\"><span style=\"color: #000080\">Dual-gate silicon carbide (SiC) lateral nanoelectromechanical switches<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/6556708\/proceeding\">IEEE International Conference on Nano\/Micro Engineered and Molecular Systems<\/a> (NEMS)<\/span>: 554-557 (2013). <strong><span style=\"color: #ff6600\">[Best Student Paper Award].<\/span><\/strong><br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6559791\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6559791\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[ASPDAC&#8217;13] <\/strong><\/span><u>Yu Zheng<\/u>, <u>Aswin Raghav Krishna<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">ScanPUF: Robust ultralow-overhead PUF using scan chain<\/span>&#8220;.<\/span> <span class=\"title\"><span class=\"title\"><a href=\"https:\/\/www.aspdac.com\/aspdac2013\/\">Asia and South Pacific Design Automation Conference<\/a><\/span><\/span><span class=\"title\"><span class=\"title\"> (ASP-DAC)<\/span><\/span>: 626-631 (2013).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6509668\/\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6509668\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[MEMS&#8217;13] <\/strong><\/span>Tina He, Rui Yang, Srihari Rajgopal, Mary Anne Tupta, <strong>Swarup Bhunia<\/strong>, Mehran Mehregany, and Philip X.-L. Feng, \u201c<span style=\"color: #000080\">Robust Silicon Carbide (SiC) Nanoelectromechanical Switches with Long Cycles in Ambient and High Temperature Conditions<\/span>\u201d. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/6471302\/proceeding\">IEEE International Conference on Micro Electro Mechanical Systems<\/a> (MEMS): 516-519 (2013).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6474292\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6474292\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[PHT&#8217;13] <\/strong><\/span><u>Abhishek Basak<\/u>, <u>Vaishnavi Ranganathan<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">A Wearable Ultrasonic Assembly for Point-Of-Care Autonomous Diagnostics of Malignant Growth<\/span>\u201d. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/6449584\/proceeding\">IEEE EMBS Special Topic Conference on Point-of-Care Healthcare Technologies<\/a> (PHT): 128-131 (2013). <span style=\"color: #ff6600\"><strong>[Student Paper Competition Winner (2<sup>nd<\/sup> Place)].<\/strong><\/span><br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6461301\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6461301\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[VLSID&#8217;13] <\/strong><\/span><u>Maryamsadat Hashemian<\/u> and <strong>Swarup Bhunia<\/strong>, &#8220;<span style=\"color: #000080\">Ultra-Power and Robust Embedded Memory for Bioimplantable Microsystems<\/span>&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/9885796\/proceeding\">International Conference on VLSI Design<\/a> (VLSID): 66-71 (2013).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6472615\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6472615\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[VLSID&#8217;13] <\/strong><\/span>Hadi Hajimiri, Prabhat Mishra, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Dynamic Cache Tuning for Efficient Memory Based Computing in Multicore Architectures<\/span>&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/9885796\/proceeding\">International Conference on VLSI Design<\/a> (VLSID)<\/span>: 49-54 (2013).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6472612\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6472612\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2012<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>DFTS&#8217;12] <\/strong><\/span><u>Xinmu Wang<\/u>, <u>Seetharam Narasimhan<\/u>, <u>Aswin Krishna<\/u>, <u>Tatini Mal-Sarkar,<\/u> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Software exploitable hardware Trojans in embedded processor<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/6362314\/proceeding\">IEEE International Symposium on Defect Tolerance in VLSI and Nanotechnology Systems<\/a> (DFT): 55-58 (2012). <span style=\"color: #ff6600\"><strong>[Student Paper Award].<\/strong><\/span><br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6378199\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6378199\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>EMBC&#8217;12] <\/strong><\/span><u>Abhishek Basak<\/u>, <u>Vaishnavi Ranganathan<\/u>, Seetharam Narasimhan, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Implantable ultrasonic dual functional assembly for detection and treatment of anomalous growth<\/span>&#8220;.<\/span>\u00a0 <a href=\"https:\/\/ieeetv.ieee.org\/welcome-to-embc-2012\">Annual International Conference of the IEEE Engineering in Medicine and Biology Society<\/a> (EMBC): 170-173 (2012). <span style=\"color: #ff6600\"><strong>[Student Best Paper Finalist].<\/strong><\/span><\/li>\n<li><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6345898\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6345898\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>GLSVLSI&#8217;12] <\/strong><\/span>Kamran Rahmani, Prabhat Mishra, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Memory-based Computing for Performance and Energy Improvement in Multicore Architectures<\/span>\u201d. <a href=\"https:\/\/www.glsvlsi.org\/archive\/glsvlsi22\/index.html\">22nd ACM Great Lakes Symposium on VLSI Conference<\/a> (GLSVLSI): 287-290 (2012).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/2206781.2206851\">Abstract<\/a> | <a href=\"https:\/\/dl.acm.org\/doi\/epdf\/10.1145\/2206781.2206851\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>VLSID&#8217;12] <\/strong><\/span><u>Xinmu Wang<\/u>, <u>Seetharam Narasimhan,<\/u> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">SCARE: Side-Channel Analysis Based Reverse Engineering for Post-Silicon Validation<\/span>&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/6167333\/proceeding\">International Conference on VLSI Design<\/a> (VLSID)<\/span>: 304-309 (2012).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6167769\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6167769\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>VLSID&#8217;12] <\/strong><\/span><u>Anandaroop Ghosh<\/u>, <u>Somnath Paul<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Energy-Efficient Application Mapping in FPGA through Computation in Embedded Memory Blocks<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/6167333\/proceeding\">International Conference on VLSI Design<\/a> (VLSID)<\/span>: 424-429 (2012).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6167789\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6167789\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>VLSID&#8217;12] <\/strong><\/span><u>Lei Wang<\/u>, <u>Somnath Paul<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Width-Aware Fine-Grained Dynamic Supply Gating: A Design Methodology for Low-Power Datapath and Memory<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/6167333\/proceeding\">International Conference on VLSI Design<\/a> (VLSID)<\/span>: 340-345 (2012). <span style=\"color: #ff6600\"><strong>[Best paper award]<\/strong><\/span><br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6167775\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6167775\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2011<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>InfoSecHiComNet<\/strong><\/span><span style=\"color: #000080\"><strong>&#8217;11] <\/strong><\/span><u>Rajat Subhra Chakraborty<\/u>, <u>Seetharam Narasimhan<\/u> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Embedded Software Security through Key-Based Control Flow Obfuscation<\/span>&#8220;. <a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.5555\/2062981\">International Conference on Security Aspects in Information Technology<\/a> (InfoSecHiComNet)<\/span>: 30-44 (2011).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/abs\/10.5555\/2062981.2062988\">Abstract<\/a> | <a href=\"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-content\/uploads\/sites\/689\/2026\/02\/978-3-642-24586-2_5.pdf\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>EMBC&#8217;11] <\/strong><\/span><u>Abhishek Basak<\/u>, <u>Seetharam Narasimhan<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Low Power Implantable Ultrasound Imager for Online Monitoring of Tumor Growth<\/span>\u201d. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/6067544\/proceeding\">33rd Annual International Conference of the IEEE Engineering in Medicine and Biology Society<\/a> (EMBC): 2858-2861 (2011).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6090789\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?arnumber=6090789\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>CHES&#8217;11] <\/strong><\/span><u>Aswin Raghav Krishna<\/u>, <u>Seetharam Narasimhan<\/u>, <u>Xinmu Wang<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">MECCA: A Robust Low-Overhead PUF Using Embedded Memory Array<\/span>&#8220;.<\/span> <a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-3-642-23951-9\">Cryptographic Hardware and Embedded Systems<\/a> (CHES): 407-420 (2011). <span style=\"color: #ff6600\"><strong>[Best paper candidate]<\/strong><\/span><span style=\"color: #ff6600\"><strong><br \/><\/strong><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.5555\/2044928.2044964\">Abstract<\/a> | <a href=\"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-content\/uploads\/sites\/689\/2026\/02\/978-3-642-23951-9_27.pdf\">PDF<\/a>]<\/span><strong><br \/><\/strong><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>NANOARCH&#8217;11] <\/strong><\/span><u>Xinmu Wang<\/u>, <u>Seetharam Narasimhan<\/u>, <u>Somnath Paul<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">NEMTronics: Symbiotic integration of nanoelectronic and nanomechanical devices for energy-efficient adaptive computing<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.5555\/2052096?id=31\">IEEE\/ACM International Symposium on Nanoscale Architectures<\/a> (NANOARCH)<\/span>: 210-217 (2011).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5941506\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5941506\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>HOST&#8217;11] <\/strong><\/span><u>Seetharam Narasimhan<\/u>, <u>Xinmu Wang<\/u>, <u>Dongdong Du<\/u>, Rajat Subhra Chakraborty, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">TeSR: A robust Temporal Self-Referencing approach for Hardware Trojan detection<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/5946040\/proceeding\">IEEE International Workshop on Hardware-Oriented Security and Trust<\/a> (HOST)<\/span>: 71-74 (2011).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5954999\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5954999\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>HEALTHCOM&#8217;11] <\/strong><\/span><u>Abhishek Basak<\/u>, <u>Seetharam Narasimhan<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">KiMS: Kids&#8217; Health Monitoring System at Day-Care Centers using Wearable Sensors and Vocabulary-based Acoustic Signal Processing<\/span>\u201d. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/6019109\/proceeding\">13th IEEE International Conference on e-Health Networking, Application &amp; Services<\/a> (Healthcom): 1-8 (2011).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6026744\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6026744\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>NVMW&#8217;11] <\/strong><\/span>Subho Chatterjee, Saibal Mukhopadhyay, Mitchelle Rasquinha, Sudhakar Yalamanchili, <strong>Swarup Bhunia<\/strong>, and <u>Somnath Paul<\/u>, \u201c<span style=\"color: #000080\">Energy Efficient Circuit-System Codesign For Spin Torque Transfer Random Access Memory (STTRAM) In Submicron Technologies<\/span>\u201d. <a href=\"http:\/\/nvmw.ucsd.edu\/\">Non-Volatile Memories Workshop<\/a> (NVMW) (2011).<\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>DATE&#8217;11] <\/strong><\/span><u>Xinmu Wang<\/u>, <u>Seetharam Narasimhan<\/u>, <u>Aswin Krishna<\/u>, Francis G. Wolff, Hari and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">High-temperature (&gt;500\u00b0C) reconfigurable computing using silicon carbide NEMS switches<\/span>&#8220;.<\/span><span class=\"title\"> <a href=\"https:\/\/past.date-conference.com\/date11\/\">Design, Automation and Test in Europe Conference<\/a><\/span> (DATE): 1065-1070 (2011).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5763175\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6026744\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>DATE&#8217;11] <\/strong><\/span>Subidh Ali, Debdeep Mukhopadhyay, Rajat Subhra Chakraborty, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Multi-level attacks: An emerging security concern for cryptographic hardware<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/past.date-conference.com\/date11\/\">Design, Automation and Test in Europe Conference<\/a><\/span> (DATE): 1176-1179 (2011).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5763307\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5763307\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>VLSID&#8217;11] <\/strong><\/span><u>Keerthi Kunaparaju<\/u>, <u>Seetharam Narasimhan<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">VaROT: Methodology for Variation-Tolerant DSP Hardware Design Using Post-Silicon Truncation of Operand Width<\/span>&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/5716645\/proceeding\">International Conference on VLSI Design<\/a> (VLSID)<\/span>: 310-315 (2011).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5718820\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5718820\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2010<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>AHS&#8217;10] <\/strong><\/span><u>Seetharam Narasimhan<\/u>, <u>Somnath Paul<\/u>, <u>Rajat Subhra Chakraborty<\/u>, Francis Wolff, Christos Papachristou, Daniel Weyer, and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">System level self-healing for parametric yield and reliability improvement under power bound<\/span>&#8220;.<\/span> <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/5535249\/proceeding\">NASA\/ESA Conference on Adaptive Hardware and Systems<\/a> (AHS): 52-58 (2010).<br \/><span style=\"color: #ff6600\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5546231\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5546231\">PDF<\/a>]<\/span><\/span><\/span><span style=\"color: #ff6600\"><span style=\"color: #000080\"><br \/><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>CHES&#8217;10] <\/strong><\/span><u>Rajat Subhra Chakraborty<\/u> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Embedded Software Security through Key-Based Control Flow Obfuscation<\/span>&#8220;.<\/span> <a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-3-642-15031-9\">Cryptographic Hardware and Embedded Systems<\/a> (CHES): 30-44 (2010).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/abs\/10.5555\/2062981.2062988\">Abstract<\/a> | <a href=\"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-content\/uploads\/sites\/689\/2026\/02\/978-3-642-24586-2_5.pdf\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>EMBC&#8217;10] <\/strong><\/span><u>Seetharam Narasimhan<\/u>, <u>Xinmu Wang,<\/u> and<strong> Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Implantable Electronics: Emerging Design Issues and An Ultra Light-weight Security Solution<\/span>\u201d. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/5608545\/proceeding\">Annual International Conference of the IEEE Engineering in Medicine and Biology Society<\/a> (EMBC): 6425-6428 (2010).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5627327\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5627327\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>IGCC&#8217;10] <\/strong><\/span><u>Seetharam Narasimhan<\/u>, David McIntyre, <u>Yu Zhou<\/u>, Francis Wolff, Daniel Weyer, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">A supply-demand model based scalable energy management system for improved energy utilization efficiency<\/span>&#8220;.<\/span> <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/5586929\/proceeding\">International Conference on Green Computing<\/a> (ICGC): 97-105 (2010).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5598260\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5598260\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>CHES&#8217;10] <\/strong><\/span><u>Dongdong Du<\/u>, <u>Seetharam Narasimhan<\/u>, <u>Rajat Subhra Chakraborty<\/u> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Self-referencing: A Scalable Side-Channel Approach for Hardware Trojan Detection<\/span>&#8220;.<\/span> <a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-3-642-15031-9\">Cryptographic Hardware and Embedded Systems<\/a> (CHES): 173-187 (2010)<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/chapter\/10.1007\/978-3-642-15031-9_12\">Abstract<\/a> | <a href=\"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-content\/uploads\/sites\/689\/2026\/02\/978-3-642-15031-9_12.pdf\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ISLPED&#8217;10] <\/strong><\/span><u>Somnath Paul<\/u> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">VAIL: variation-aware issue logic and performance binning for processor yield and profit improvement<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/islped.org\/2010\/\">IEEE\/ACM International Symposium on Low Power Electronics and Design <\/a>(ISLPED)<\/span>: 37-42 (2010).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5599039\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5599039\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>IOLTS&#8217;10] <\/strong><\/span>David McIntyre, Francis Wolff, Chris Papachristou, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Trustworthy computing in a multi-core system using distributed scheduling<\/span>&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/5550907\/proceeding\">IEEE Symposium on On-Line Testing<\/a> (IOLTS)<\/span>: 211-213 (2010).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5560200\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5560200\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>NAECON&#8217;10] <\/strong><\/span>Chris Papachristou, <strong>Swarup Bhunia<\/strong>, and Francis Wolff, \u201c<span style=\"color: #000080\">Network Calibration of Embedded Sensors<\/span>\u201d. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/5706872\/proceeding\">IEEE National Aerospace and Electronics Conference<\/a> (NAECON): 269-274 (2010).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/abstract\/document\/5712959\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5712959\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>HOST&#8217;10] <\/strong><\/span><u>Dongdong Du<\/u>, <u>Seetharam Narasimhan<\/u>, <u>Rajat Subhra Chakraborty<\/u>, Chris Papachristou, <u>Somnath Paul,<\/u> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Multiple-Parameter Side-Channel Analysis: A Non-invasive Hardware Trojan Detection Approach<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/5507538\/proceeding\">IEEE International Workshop on Hardware-Oriented Security and Trust<\/a> (HOST)<\/span>: 13-18 (2010). <span style=\"color: #ff6600\"><strong>[Best paper candidate].<\/strong><\/span><br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5513122\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5513122\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>VLSID&#8217;10] <\/strong><\/span><u>Rajat Subhra Chakraborty<\/u> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">RTL Hardware IP Protection Using Key-Based Control and Data Flow Obfuscation<\/span>&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/5400049\/proceeding\">International Conference on VLSI Design<\/a> (VLSID)<\/span>: 405-410 (2010).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5401214\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5401214\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2009<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>NANO&#8217;09] <\/strong><\/span><u>Somnath Paul<\/u>, Subho Chatterjee, Saibal Mukhopadhyay and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Nanoscale Reconfigurable Computing Using Non-Volatile 2-D STTRAM Array<\/span>\u201d. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/5374438\/proceeding\">9<sup>th<\/sup> International Conference on Nanotechnology<\/a> (NANO): 880-883 (2009).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/abstract\/document\/5394653\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5394653\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ICCAD&#8217;09] <\/strong><\/span><u>Somnath Paul<\/u>, Subho Chatterjee, Saibal Mukhopadhyay and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">A circuit-software co-design approach for improving EDP in reconfigurable frameworks<\/span>&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/5357317\/proceeding\">IEEE International Conference on Computer-Aided Design<\/a> (ICCAD)<\/span>: 109-112 (2009).<br \/><span style=\"color: #ff6600\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5361305\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5361305\">PDF<\/a>]<\/span><\/span><\/span><span style=\"color: #ff6600\"><span style=\"color: #000080\"><br \/><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ICCAD&#8217;09] <\/strong><\/span><u>Somnath Paul<\/u>, Saibal Mukhopadhyay and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">A variation-aware preferential design approach for memory based reconfigurable computing<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/5357317\/proceeding\">IEEE International Conference on Computer-Aided Design<\/a> (ICCAD)<\/span>: 180-183 (2009).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5361296\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5361296\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ICCAD&#8217;09] <\/strong><\/span><u>Rajat Subhra Chakraborty<\/u> and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">Security against hardware Trojan through a novel application of design obfuscation<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/5357317\/proceeding\">IEEE International Conference on Computer-Aided Design<\/a> (ICCAD)<\/span>: 113-116 (2009).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5361306\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5361296\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>TRANSDUCERS&#8217;09] <\/strong><\/span>Te-Hao Lee, Kevin M. Speer, Xiaoan Fu, <strong>Swarup Bhunia<\/strong>, and Mehran Mehregany, &#8220;<span style=\"color: #000080\">Polycrystalline Silicon Carbide NEMS for High-Temperature Logic<\/span>&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/5271854\/proceeding\">International Conference on Solid State Sensors and Actuators<\/a> (TRANSDUCERS): 900-903 (2009).<br \/><span style=\"font-size: 1.25rem\"><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5285907\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5285907\">PDF<\/a>]<\/span><\/span><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>HOST&#8217;09] <\/strong><\/span><u>Rajat Subhra Chakraborty<\/u> and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">Security Through Obscurity: An Approach for Protecting Register Transfer Level Hardware IP<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/5209455\/proceeding\">IEEE International Workshop on Hardware-Oriented Security and Trust<\/a> (HOST)<\/span>: 96-99 (2009).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5224963\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5224963\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>HOST&#8217;09] <\/strong><\/span>David McIntyre, Francis Wolff, Chris Papachristou, <strong>Swarup Bhunia<\/strong> and Dan Weyer, &#8220;<span class=\"title\"><span style=\"color: #000080\">Dynamic Evaluation of Hardware Trust<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/5209455\/proceeding\">IEEE International Workshop on Hardware-Oriented Security and Trust<\/a> (HOST)<\/span>: 108-111 (2009).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5224990\/\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5224990\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>CHES&#8217;09] <\/strong><\/span><u style=\"font-size: 1.25rem\">Rajat Subhra Chakraborty<\/u><span style=\"font-size: 1.25rem\">, Francis Wolff, <\/span><u style=\"font-size: 1.25rem\">Somnath Paul<\/u><span style=\"font-size: 1.25rem\">, Christos Papachristou and <\/span><strong style=\"font-size: 1.25rem\">Swarup Bhunia<\/strong><span style=\"font-size: 1.25rem\">, &#8220;<span class=\"title\"><span style=\"color: #000080\">MERO: A Statistical Approach for Hardware Trojan Detection<\/span>&#8220;.<\/span> <a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-3-642-04138-9\">Cryptographic Hardware and Embedded Systems<\/a> (CHES): 396-410 (2009).<\/span><span style=\"font-size: 1.25rem\"><br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/chapter\/10.1007\/978-3-642-04138-9_28\">Abstract<\/a> | <a href=\"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-content\/uploads\/sites\/689\/2026\/02\/978-3-642-04138-9_28.pdf\">PDF<\/a>]<\/span><\/span><br \/><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>EMBC&#8217;09] <\/strong><\/span><u>Seetharam Narasimhan<\/u>, Hillel J. Chiel and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">A Preferential Design Approach for Energy-Efficient and Robust Implantable Neural Signal Processing<\/span>\u201d. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/5307844\/proceeding\">Annual International Conference of the IEEE Engineering in Medicine and Biology Society<\/a> (EMBC): 6383-6386 (2009). <span style=\"color: #ff6600\"><strong>[Student Best Paper Finalist]<\/strong><\/span>.<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5333729\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5333729\">PDF<\/a>]<\/span><\/span><\/span><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\"><br \/><\/span><\/span><\/span><\/li>\n<\/ul>\n<h4>2008<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>NMDC&#8217;08] <\/strong><\/span>Te-Hao Lee, Kevin M. Speer, Kenji Okino, Xiaoan Fu, <strong>Swarup Bhunia,<\/strong> and Mehran Mehregany, \u201c<span style=\"color: #000080\">Polycrystalline-SiC Nanoelectromechanical Switches for High-Temperature Switching and Logic Applications<\/span>\u201d. <a href=\"https:\/\/ieeenmdc.org\/nmdc-2025\/\">IEEE Nanotechnology and Device Conference<\/a> (NMDC) (2008).<\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ICCAD&#8217;08] <\/strong><\/span><u>Rajat Subhra Chakraborty<\/u> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Hardware protection and authentication through netlist level obfuscation<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/4670335\/proceeding\">IEEE International Conference on Computer-Aided Design<\/a> (ICCAD)<\/span>: 674-677 (2008).<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4681649\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4681649\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ICCAD&#8217;08] <\/strong><\/span><u>Somnath Paul,<\/u> Saibal Mukhopadhyay, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Hybrid CMOS-STTRAM FPGA Design Optimization for Low Power and High Integration Density<\/span>\u201d. <span class=\"title\"><a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/4670335\/proceeding\">IEEE International Conference on Computer-Aided Design<\/a> (ICCAD):<\/span> 589-592 (2008).<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.5555\/1509456.1509587\">Abstract<\/a> | <a href=\"https:\/\/www.cecs.uci.edu\/~papers\/iccad08\/PDFs\/Papers\/08A.1.pdf\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>EMBC&#8217;08] <\/strong><\/span><u>Seetharam Narasimhan<\/u>, Miranda Cullins, Hillel Chiel, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Wavelet-Based Neural Pattern Analyzer for Behaviorally Significant Burst Pattern Recognition<\/span>\u201d. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/4636107\/proceeding\">Annual International Conference of the IEEE Engineering in Medicine and Biology Society<\/a> (EMBC): 38-41 (2008).<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4649085\">Abstract<\/a> | <a href=\"https:\/\/www.cecs.uci.edu\/~papers\/iccad08\/PDFs\/Papers\/08A.1.pdf\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>HOST&#8217;08] <\/strong><\/span><u>Rajat Subhra Chakraborty<\/u>, <u>Somnath Paul<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">On-Demand Transparency for Improving Hardware Trojan Detectability<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/4556640\/proceeding\">IEEE International Workshop on Hardware-Oriented Security and Trust<\/a> (HOST)<\/span>: 48-50 (2008).<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4559048\">Abstract<\/a> | <a href=\"https:\/\/www.cecs.uci.edu\/~papers\/iccad08\/PDFs\/Papers\/08A.1.pdf\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>DAC&#8217;08] <\/strong><\/span><u>Seetharam Narasimhan<\/u>, <u>Somnath Paul,<\/u> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Collective computing based on swarm intelligence<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/1391469\">Design Automation Conference<\/a> (DAC): 349-350 (2008). <span style=\"color: #ff6600\"><strong>[WACI (Wild &amp; Crazy Ideas) Paper]<\/strong><\/span>.<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4555840\">Abstract<\/a> | <a href=\"https:\/\/www.cecs.uci.edu\/~papers\/iccad08\/PDFs\/Papers\/08A.1.pdf\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[DAC<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>&#8217;08] <\/strong><\/span><u>Somnath Paul<\/u> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Reconfigurable computing using content addressable memory for improved performance and resource usage<\/span>&#8220;.<\/span> <a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/1391469\">Design Automation Conference<\/a> (DAC): 786-791 (2008).<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4555926\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4555926\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ISQED&#8217;08] <\/strong><\/span><u>Rajat Subhra Chakraborty<\/u> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Micropipeline-Based Asynchronous Design Methodology for Robust System Design Using Nanoscale Crossbar<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/www.isqed.org\/English\/Archives\/2008\/index.html\">International Symposium on Quality Electronic Design<\/a> (ISQED)<\/span>: 697-701 (2008).<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4479822\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4479822\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>GLSVLSI&#8217;08] <\/strong><\/span><u>Matthew Holtz<\/u>, <u>Seetharam Narasimhan,<\/u> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">On-die CMOS voltage droop detection and dynamic compensation<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/1366110\">ACM Great Lakes Symposium on VLSI<\/a> (GLSVLSI): 35-40 (2008).<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/1366110.1366122\">Abstract<\/a> | <a href=\"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1366110.1366122\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ISQED&#8217;08] <\/strong><\/span><u>Yu Zhou<\/u>, <u>Somnath Paul<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Towards Uniform Temperature Distribution in SOI Circuits Using Carbon Nanotube Based Thermal Interconnect<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/www.isqed.org\/English\/Archives\/2008\/index.html\">International Symposium on Quality Electronic Design<\/a> (ISQED)<\/span>: 861-866 (2008).<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4479851\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4479851\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>DATE&#8217;08] <\/strong><\/span><u>Lawrence Leinweber<\/u> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Fine-Grained Supply Gating Through Hypergraph Partitioning and Shannon Decomposition for Active Power Reduction<\/span>&#8220;.<\/span>\u00a0<span class=\"title\"><a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/1403375\">Design, Automation and Test in Europe Conference<\/a><\/span> (DATE): 373-378 (2008).<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4484709\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4484709\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>DATE&#8217;08] <\/strong><\/span><u>Yu Zhou<\/u>, <u>Somnath Paul<\/u> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Harvesting Wasted Heat in a Microprocessor Using Thermoelectric Generators: Modeling, Analysis and Measurement<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/1403375\">Design, Automation and Test in Europe Conference<\/a><\/span> (DATE): 98-103 (2008).<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4484669\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4484669\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>DATE&#8217;08] <\/strong><\/span>Francis Wolff, Christos Papachristou, <u>Rajat Subhra Chakraborty,<\/u> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Towards Trojan-Free Trusted ICs: Problem Analysis and Detection Scheme<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/1403375\">Design, Automation and Test in Europe Conference<\/a><\/span> (DATE) : 1362-1365 (2008).<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4484928\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4484928\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>VLSID&#8217;08] <\/strong><\/span><u>Rajat Subhra Chakraborty<\/u>, <u>Somnath Paul,<\/u> and <strong>Swarup Bhunia<\/strong>, &#8220;<span style=\"color: #000080\">Analysis and Robust Design of Diode-Resistor Based Nanoscale Crossbar PLA Circuits<\/span>&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/4450447\/proceeding\">International Conference on VLSI Design<\/a> (VLSID): 441-446 (2008).<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4450540\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4450540\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ASPDAC&#8217;08] <\/strong><\/span><u>Somnath Paul<\/u> and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">MBARC: A scalable memory based reconfigurable computing framework for nanoscale devices<\/span>&#8220;.<\/span> <span class=\"title\"><span class=\"title\"><a href=\"https:\/\/www.aspdac.com\/aspdac2008\/\">Asia and South Pacific Design Automation Conference <\/a><\/span><\/span><span class=\"title\"><span class=\"title\">(ASP-DAC)<\/span><\/span>: 77-82 (2008).<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4484057\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4484057\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<\/ul>\n<h4>2007<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>BIOCAS&#8217;07] <\/strong><\/span><u>Seetharam Narasimhan<\/u>, <u>Yu Zhou<\/u>, Hillel J. Chiel, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Low-Power VLSI Architecture for Neural Data Compression Using Vocabulary-based Approach<\/span>\u201d. <span class=\"title\"><a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/4459265\/proceeding\">IEEE Biomedical Circuits and Systems Conference<\/a> (BioCAS): 134-137<\/span> (2007).<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4463327\/\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4463327\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ICCD&#8217;07] <\/strong><\/span><u>Somnath Paul<\/u> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Memory based computation using embedded cache for processor yield and reliability improvement<\/span>&#8220;.<\/span> <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/4591423\/proceeding\">IEEE International Conference on Computer Design<\/a> (ICCD): 341-346 (2007).<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4601922\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4601922&amp;tag=1\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ICCAD&#8217;07] <\/strong><\/span><u>Somnath Paul<\/u>, <u>Siva Krishnamurthy<\/u>, Hamid Mahmoodi, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Low-overhead design technique for calibration of maximum frequency at multiple operating points<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/4397222\/proceeding\">IEEE International Conference on Computer-Aided Design<\/a> (ICCAD)<\/span>: 401-404 (2007).<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4397298\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4397298\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ISLPED&#8217;07] <\/strong><\/span><u>Yu Zhou<\/u>, Shijo Thekkel, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Low power FPGA design using hybrid CMOS-NEMS approach<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/1283780\">IEEE\/ACM International Symposium on Low Power Electronics and Design <\/a>(ISLPED)<\/span>: 14-19 (2007).<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5514274\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5514274\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>IOLTS&#8217;07] <\/strong><\/span><u>Somnath Paul<\/u>, <u>Rajat Chakraborty<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Defect-Aware Configurable Computing in Nanoscale Crossbar for Improved Yield<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/4274802\/proceeding\">IEEE Symposium on On-Line Testing<\/a> (IOLTS)<\/span>: 29-36 (2007).<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/abstract\/document\/4274817\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4274817\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>IOLTS&#8217;07] <\/strong><\/span>Swaroop Ghosh, Patrick N. Dai, <strong>Swarup Bhunia<\/strong>, and Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">Tolerance to Small Delay Defects by Adaptive Clock Stretching<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/4274802\/proceeding\">IEEE Symposium on On-Line Testing<\/a> (IOLTS)<\/span>: 244-252 (2007).<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4274858\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4274858\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>EMBS&#8217;07] <\/strong><\/span><u>Seetharam Narasimhan<\/u>, Massood Tabib-Azar, Hillel J. Chiel, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Neural Data Compression with Wavelet Transform: A Vocabulary Based Approach<\/span>\u201d. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/4227184\/proceeding\">International IEEE\/EMBS on Neural Engineering<\/a> (EMBS): 666-669 (2007).<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4227365\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4227365\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>VTS&#8217;07] <\/strong><\/span><u>Somnath Paul<\/u>, <u>Rajat Subhra Chakraborty<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">VIm-Scan: A Low Overhead Scan Design Approach for Protection of Secret Key in Scan-Based Secure Chips<\/span>&#8220;.<\/span> <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/4209869\/proceeding\">IEEE VLSI Test Symposium<\/a> (VTS): 455-460 (2007).<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4209953\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4209953\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>NANOTECH&#8217;07] <\/strong><\/span><u>Rajat Chakraborty<\/u>, <u>Seetharam Narasimhan<\/u>, <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Hybridization of CMOS With CNT-Based Nano-Electromechanical Switch for Low Leakage and Robust Circuit Design<\/span>&#8220;.<\/span> <a href=\"https:\/\/briefs.techconnect.org\/books\/technical-proceedings-of-the-2007-nsti-nanotechnology-conference-and-trade-show-volume-1\/\">NSTI Nanotechnology Conference and Trade Show<\/a> (NANOTECH): 2480-2488 (2007).<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/www.academia.edu\/1349314\/Hybridization_of_CMOS_with_CNT_based_nano_electromechanical_switch_for_low_leakage_and_robust_circuit_design\">Abstract<\/a> | <a href=\"https:\/\/briefs.techconnect.org\/wp-content\/volumes\/Nanotech2007v1\/pdf\/1080.pdf\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ISQED&#8217;07] <\/strong><\/span><u>Siva Krishnamurthy<\/u>, <u>Somnath Paul<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Adaptation to Temperature-Induced Delay Variations in Logic Circuits Using Low-Overhead Online Delay Calibration<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/www.isqed.org\/English\/Archives\/2007\/index.html\">International Symposium on Quality Electronic Design<\/a> (ISQED)<\/span>: 755-760 (2007).<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4149125\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4149125\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>DATE&#8217;07] <\/strong><\/span>Swaroop Ghosh, <strong>Swarup Bhunia<\/strong>, and Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">Low-overhead circuit synthesis for temperature adaptation using dynamic voltage scheduling<\/span>&#8220;.<\/span><span class=\"title\"> <a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.5555\/1266366\">Design, Automation and Test in Europe Conference<\/a><\/span> (DATE): 1532-1537 (2007).<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4212028\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?arnumber=4212028\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ASPDAC&#8217;07] <\/strong><\/span><strong>Swarup Bhunia<\/strong>, Massood Tabib Azar, and Daniel Saab, \u201c<span class=\"title\"><span style=\"color: #000080\">Ultralow-Power Reconfigurable Computing with Complementary Nano-Electromechanical Carbon Nanotube Switches<\/span>&#8220;.<\/span> <span class=\"title\"><span class=\"title\"><a href=\"https:\/\/www.aspdac.com\/aspdac2007\/\">Asia and South Pacific Design Automation Conference <\/a><\/span><\/span><span class=\"title\"><span class=\"title\">(ASP-DAC)<\/span><\/span>: 86-91 (2007).<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4196001\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4196001\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<\/ul>\n<h4>2006<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>NANOARCH&#8217;06] <\/strong><\/span><strong>Swarup Bhunia<\/strong>, Massood Tabib-Azar, and Daniel Saab, \u201c<span style=\"color: #000080\">Ultralow-Power Adaptive System Architecture Using Complementary Nano-Electromechanical Carbon Nanotube Switches<\/span>\u201d. <span class=\"title\"><a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.5555\/2052096?id=31\">IEEE\/ACM International Symposium on Nanoscale Architectures<\/a> (NANOARCH)<\/span> (2006).<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4196001\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4196001\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ICCAD&#8217;06] <\/strong><\/span>Swaroop Ghosh, <strong>Swarup Bhunia<\/strong>, and Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">CRISTA: A New Paradigm for Low-Power, Variation-Tolerant, and Adaptive Circuit Synthesis Using Critical Path Isolation<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/4768844\/proceeding\">IEEE International Conference on Computer-Aided Design<\/a> (ICCAD)<\/span>: 1947-1956 (2006).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4352005\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4352005\">PDF<\/a>]<\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ASPDAC&#8217;06] <\/strong><\/span>Ashish Goel, <strong>Swarup Bhunia<\/strong>, Hamid Mahmoodi, and Kaushik Roy, \u201c<span style=\"color: #000080\">A Low-Overhead Design of Soft-Error-Tolerant Scan Flip-Flop with Enhanced-Scan Capability<\/span>\u201d. <span class=\"title\"><span class=\"title\"><a href=\"https:\/\/www.aspdac.com\/aspdac2006\/welcome\/\">Asia and South Pacific Design Automation Conference <\/a><\/span><\/span><span class=\"title\"><span class=\"title\">(ASP-DAC): <\/span><\/span>665-670 (2006).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1594762\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1594762\">PDF<\/a>]<\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ASPDAC&#8217;06] <\/strong><\/span>Animesh Datta, <strong>Swarup Bhunia<\/strong>, Jung Hwan Choi, Saibal Mukhopadhyay, and Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">Speed binning aware design methodology to improve profit under parameter variations<\/span>&#8220;.<\/span> <span class=\"title\"><span class=\"title\"><a href=\"https:\/\/www.aspdac.com\/aspdac2006\/welcome\/\">Asia and South Pacific Design Automation Conference <\/a><\/span><\/span><span class=\"title\"><span class=\"title\">(ASP-DAC)<\/span><\/span>: 712-717 (2006). <strong><span style=\"color: #ff6600\">[Best Paper Nomination]<\/span><\/strong>.\u00a0<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1594770\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1594770\">PDF<\/a>]<\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>DATE&#8217;06] <\/strong><\/span>Nilanjan Banerjee, <strong>Swarup Bhunia<\/strong>, Hamid Mahmoodi, and Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">Low power synthesis of dynamic logic circuits using fine-grained clock gating<\/span>&#8220;. <\/span><a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.5555\/1131481\">Design, Automation and Test in Europe Conference<\/a> (DATE): 862-867 (2006).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1657010\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1657010\">PDF<\/a>]<\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>IOLTS&#8217;06] <\/strong><\/span>Swaroop Ghosh, <strong>Swarup Bhunia<\/strong>, Arijit Raychowdhury, Kaushik Roy, &#8220;<span style=\"color: #000080\">Delay Fault Localization in Test-Per-Scan BIST Using Built-In Delay Sensor<\/span>&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/11010\/proceeding\">IEEE Symposium on On-Line Testing<\/a> (IOLTS): 31-36 (2006).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1655512\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1655512\">PDF<\/a>]<\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>DATE&#8217;06] <\/strong><\/span>Arijit Raychowdhury, Bipul Chandra Paul, <strong>Swarup Bhunia<\/strong>, Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">Ultralow power computing with sub-threshold leakage: a comparative study of bulk and SOI technologies<\/span>&#8220;.<\/span> <a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.5555\/1131481\">Design, Automation and Test in Europe Conference<\/a> (DATE): 856-861 (2006).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1657009\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?arnumber=1657009\">PDF<\/a>]<\/span><\/li>\n<\/ul>\n<h4>2005<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ISLPED&#8217;05] <\/strong><\/span>Amit Agarwal, Kunhyuk Kang, <strong>Swarup Bhunia<\/strong>, and Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">Effectiveness of low power dual-V<sub>t<\/sub> designs in nano-scale technologies under process parameter variations<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/1077603\">IEEE\/ACM International Symposium on Low Power Electronics and Design<\/a> (ISLPED)<\/span>: 14-19 (2005).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?arnumber=1522727\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/document\/1522727\">PDF<\/a>]<\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>DAC&#8217;05] <\/strong><\/span><strong>Swarup Bhunia<\/strong>, Hamid Mahmoodi, Nilanjan Banerjee, Qikai Chen, and Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">A novel synthesis approach for active leakage power reduction using dynamic supply gating<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/1065579\">Design Automation Conference<\/a> (DAC): 479-484 (2005).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1510377\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1510377\">PDF<\/a>]<\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>VTS&#8217;05] <\/strong><\/span>Qikai Chen, Hamid Mahmoodi, <strong>Swarup Bhunia<\/strong>, and Kaushik Roy, \u201c<span style=\"color: #000080\">Modeling and Testing of SRAM for New Failure Mechanisms Due to Process Variations in Nanoscale CMOS<\/span>\u201d. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/9857\/proceeding\">IEEE VLSI Test Symposium<\/a> (VTS): 292-297 (2005).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1443438\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1443438\">PDF<\/a>]<\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>IOLTS&#8217;05] <\/strong><\/span>Animesh Datta, Saibal Mukhopadhyay, <strong>Swarup Bhunia<\/strong>, Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">Yield Prediction of High Performance Pipelined Circuit with Respect to Delay Failures in Sub-100nm Technology<\/span>&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/10031\/proceeding\">IEEE Symposium on On-Line testing<\/a> (IOLTS)<\/span>: 275-280 (2005).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1498173\/\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1498173\">PDF<\/a>]<\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ATS&#8217;05] <\/strong><\/span>Animesh Datta, <strong>Swarup Bhunia<\/strong>, Saibal Mukhopadhyay, Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">A Statistical Approach to Area-Constrained Yield Enhancement for Pipelined Circuits under Parameter Variations<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dblp.org\/db\/conf\/ats\/ats2005.html#conf\/ats\/DattaBMR05\">Asian Test Symposium<\/a> (ATS): 170-175 (2005).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1575425\/\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1575425\">PDF<\/a>]<\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ATS&#8217;05] <\/strong><\/span>Swaroop Ghosh, <strong>Swarup Bhunia<\/strong>, Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">Shannon Expansion Based Supply-Gated Logic for Improved Power and Testability<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/10525\/proceeding\">Asian Test Symposium<\/a> (ATS): 404-409 (2005).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1575463\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1575463\">PDF<\/a>]<\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>DATE&#8217;05] <\/strong><\/span><strong>Swarup Bhunia<\/strong>, Hamid Mahmoodi-Meimand, Arijit Raychowdhury, Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">A Novel Low-overhead Delay Testing Technique for Arbitrary Two-Pattern Test Application<\/span>&#8220;.<\/span> <a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.5555\/1048924\">Design, Automation and Test in Europe Conference<\/a> (DATE): 1136-1141 (2005).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1395747\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1395747\">PDF<\/a>]<\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>DATE&#8217;05] <\/strong><\/span>Saibal Mukhopadhyay, <strong>Swarup Bhunia<\/strong>, Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">Modeling and Analysis of Loading Effect in Leakage of Nano-Scaled Bulk-CMOS Logic Circuits<\/span>&#8220;.<\/span> <a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.5555\/1048924\">Design, Automation and Test in Europe Conference<\/a> (DATE): 224-229 (2005).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1395560\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1395560\">PDF<\/a>]<\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ICCD&#8217;05] <\/strong><\/span>Nilanjan Banerjee, Arijit Raychowdhury, <strong>Swarup Bhunia<\/strong>, Hamid Mahmoodi-Meimand, Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">Novel Low-Overhead Operand Isolation Techniques for Low-Power Datapath Synthesis<\/span>&#8220;.<\/span> <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/10219\/proceeding\">IEEE International Conference on Computer Design<\/a> (ICCD): 206-214 (2005).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1524154\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1524154\">PDF<\/a>]<\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ISQED&#8217;05] <\/strong><\/span>Animesh Datta, <strong>Swarup Bhunia<\/strong>, Nilanjan Banerjee, Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">A Power-Aware GALS Architecture for Real-Time Algorithm-Specific Tasks<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/www.isqed.org\/English\/Archives\/2005\/index.html\">International Symposium on Quality Electronic Design<\/a> (ISQED)<\/span>: 358-363 (2005).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1461362\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1461362\">PDF<\/a>]<\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ISQED&#8217;05] <\/strong><\/span><strong>Swarup Bhunia<\/strong>, Hamid Mahmoodi-Meimand, Debjyoti Ghosh, Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">Power Reduction in Test-Per-Scan BIST with Supply Gating and Efficient Scan Partitioning<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/www.isqed.org\/English\/Archives\/2005\/index.html\">International Symposium on Quality Electronic Design<\/a> (ISQED)<\/span>: 453-458 (2005).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1410624\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1410624\">PDF<\/a>]<\/span><\/li>\n<\/ul>\n<h4>2004<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><u><span style=\"color: #000080\"><strong>[ISQED<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>&#8217;04] <\/strong><\/span><strong>Swarup Bhunia<\/strong>, Arijit Raychowdhury, Kaushik Roy, \u201c<span style=\"color: #000080\">Frequency Specification testing of Analog Filters Using Wavelet Transform of Dynamic Supply Current<\/span><span class=\"title\">&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/9332\/proceeding\">IEEE International Symposium on Quality Electronic Design<\/a> (ISQED):<\/span><span class=\"title\">\u00a0389-394 (2004).<br \/><\/span><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1283705\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1283705\">PDF<\/a>]<\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>DFT&#8217;04] <\/strong><\/span><strong>Swarup Bhunia<\/strong>, Hamid Mahmoodi-Meimand, Arijit Raychowdhury, Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">First Level Hold: A Novel Low-Overhead Delay Fault Testing Technique<\/span>&#8220;.<\/span> <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/6362314\/proceeding\">IEEE International Symposium on Defect Tolerance in VLSI and Nanotechnology Systems<\/a> (DFT): 314-315 (2004).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1347854\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1347854\">PDF<\/a>]<\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>IOLTS&#8217;04] <\/strong><\/span>Debjyoti Ghosh, <strong>Swarup Bhunia<\/strong>, Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">A Technique to Reduce Power and Test Application Time in BIST<\/span>&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/9220\/proceeding\">IEEE Symposium on On-Line Testing<\/a> (IOLTS)<\/span>: 182-183 (2004).<br \/><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1319684\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1319684\">PDF<\/a>]<\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ICCD&#8217;04] <\/strong><\/span><strong>Swarup Bhunia<\/strong>, Hamid Mahmoodi, Saibal Mukhopadhyay, Debjyoti Ghosh, and Kaushik Roy, \u201c<span style=\"color: #000080\">A Novel Low Power Scan Design Technique Using Supply Gating<\/span>\u201d. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/9333\/proceeding\">IEEE International Conference on Computer Design<\/a> (ICCD): 60-65 (2004). <strong><span style=\"color: #ff6600\">[Best Paper Award]<br \/><\/span><\/strong><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1347900\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1347900\">PDF<\/a>]<\/span><\/span><strong><span style=\"color: #ff6600\"><br \/><\/span><\/strong><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>DATE&#8217;04] <\/strong><\/span><strong>Swarup Bhunia<\/strong>, Arijit Raychowdhury, and Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">Trim Bit Setting of Analog Filters Using Wavelet-Based Supply Current Analysis<\/span>&#8220;.<\/span> <a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.5555\/968877\">Design, Automation and Test in Europe Conference<\/a> (DATE): 704-705 (2004).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.5555\/968878.968972\">Abstract<\/a> | <a href=\"https:\/\/www.cs.york.ac.uk\/rts\/docs\/SIGDA-Compendium-1994-2004\/papers\/2004\/date04\/pdffiles\/ip2_07.pdf\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2003<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>LATS&#8217;03] <\/strong><\/span><strong>Swarup Bhunia<\/strong> and Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">Defect Oriented Testing of Analog Circuits Using Wavelet Analysis of Dynamic Supply Current<\/span>&#8220;. <a href=\"https:\/\/cas.polito.it\/LATS2026\/\">Latin American Test Symposium<\/a> (LATS)<\/span>\u00a0(2005).\u00a0<strong><span style=\"color: #ff6600\">[Best Paper Award]<br \/><\/span><\/strong><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/article\/10.1007\/s10836-005-6144-3\">Abstract<\/a> | <a href=\"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-content\/uploads\/sites\/689\/2026\/02\/s10836-008-5072-4-1.pdf\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>DFT&#8217;03] <\/strong><\/span>Debjyoti Ghosh, <strong>Swarup Bhunia<\/strong>, and Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">Multiple Scan Chain Design Technique for Power Reduction during Test Application in BIST<\/span>&#8220;.<\/span> <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/8839\/proceeding\">IEEE International Symposium on Defect Tolerance in VLSI and Nanotechnology Systems<\/a> (DFT): 191-198 (2003).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1250112\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1250112\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>HPCA&#8217;03] <\/strong><\/span>Hai Li, <strong>Swarup Bhunia<\/strong>, Yiran Chen, Kaushik Roy, and T. N. Vijaykumar. &#8220;<span style=\"color: #000080\">Deterministic Clock Gating for Microprocessor Power Reduction<\/span>&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/8433\/proceeding\">IEEE Symposium on High-Performance Computer Architecture<\/a> (HPCA): 113-122 (2003).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1183529\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1183529\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>DATE&#8217;03] <\/strong><\/span>Lih-yih Chiou, <strong>Swarup Bhunia<\/strong>, and Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">Synthesis of Application-Specific Highly-Efficient Multi-Mode Systems for Low-Power Applications<\/span>&#8220;.<\/span> <a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.5555\/789083\">Design, Automation and Test in Europe Conference<\/a> (DATE): 10096-10103 (2003).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1253593\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?arnumber=1253593\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2002<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>DATE&#8217;02] <\/strong><\/span><strong>Swarup Bhunia<\/strong> and Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">Fault Detection and Diagnosis Using Wavelet Based Transient Current Analysis<\/span>&#8220;.<\/span> <a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.5555\/882452\">Design, Automation and Test in Europe Conference<\/a> (DATE): 1118 (2002).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/998474\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=998474\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>VTS&#8217;02] <\/strong><\/span><strong>Swarup Bhunia<\/strong> and Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">Dynamic Supply Current Testing of Analog Circuits Using Wavelet Transform<\/span>&#8220;.<\/span> <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/7901\/proceeding\">IEEE VLSI Test Symposium<\/a> (VTS): 302-310 (2002).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1011158\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1011158\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>DAC&#8217;02] <\/strong><\/span><strong>Swarup Bhunia<\/strong>, Kaushik Roy and Jaume Segura \u201c<span class=\"title\"><span style=\"color: #000080\">A novel wavelet transform based transient current analysis for fault detection and localization<\/span>&#8220;.<\/span> <a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/513918\">Design Automation Conference<\/a> (DAC): 361-366 (2002).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1012650\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1012650\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ATS&#8217;02] <\/strong><\/span><strong>Swarup Bhunia<\/strong>, Hai Li, and Kaushik Roy, \u201c<span style=\"color: #000080\">Gated-Ground Cache: A High Performance I<sub>DDQ<\/sub>-Testable Cache for Scaled CMOS Technologies<\/span>\u201d. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/8413\/proceeding\">IEEE Asian Test Symposium<\/a> (ATS): 157-162 (2002).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/1181704\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=1181704\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2000<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>VLSID&#8217;00] <\/strong><\/span><strong>Swarup Bhunia<\/strong>, Subhasish Majumdar, Ayon Sirkar, and Susmita Sur-kolay, \u201c<span class=\"title\"><span style=\"color: #000080\">Topological Routing Amidst Polygonal Obstacles<\/span>&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/6598\/proceeding\">International Conference on VLSI Design<\/a> (VLSID)<\/span>: 274-279 (2000).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/812621\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?arnumber=812621\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>1999<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>VLSID&#8217;99] <\/strong><\/span><strong>Swarup Bhunia<\/strong>, Soumya Ghosh, Pramod Kumar, Partha Das, and Jayanta Mukherjee, \u201c<span class=\"title\"><span style=\"color: #000080\">Design, Simulation and Synthesis of an ASIC for Fractal Image Compression<\/span>&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/6007\/proceeding\">International Conference on VLSI Design(VLSID)<\/a><\/span>: 544-547 (1999).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/745211\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=745211\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<\/div><div class=\"accordion-btn-wrap\"><\/div><\/div><\/div><\/div><\/div>\n\n\n\n<div class=\"wp-block-create-block-accordion-block-inner\"><div class=\"accordion-item\"><span class=\"accordion-header\" id=\"headinga9042adc-527e-4812-8996-58683c0bdc8e\"><button class=\"accordion-button collapsed\" type=\"button\" data-bs-toggle=\"collapse\" data-bs-target=\"#collapsea9042adc-527e-4812-8996-58683c0bdc8e\" aria-expanded=\"false\" aria-controls=\"a9042adc-527e-4812-8996-58683c0bdc8e\">Other Conference Publications (Invited or Abstract Reviewed)<\/button><\/span><div id=\"collapsea9042adc-527e-4812-8996-58683c0bdc8e\" class=\"accordion-collapse collapse\" aria-labelledby=\"headinga9042adc-527e-4812-8996-58683c0bdc8e\"><div class=\"accordion-body\"><div class=\"accordion-body-wrap\">\n<h4>2026<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[VTS&#8217;26<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Sudipta Paria<\/u>, <u>Aritra Dasgupta<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Exploring Agentic LLM Paradigms for Hardware Verification across Abstraction Levels<\/span>\u201d. to appear in <a href=\"https:\/\/tttc-vts.org\/public_html\/new\/2026\/\">IEEE VLSI Test Symposium<\/a> (VTS) (2026). <strong>[Invited Full Paper]<\/strong><\/li>\n<li><span style=\"color: #000080\"><strong>[FPGA&#8217;26<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><span style=\"text-decoration: underline\">Aritra Dasgupta<\/span>, <span style=\"text-decoration: underline\">Jonathan Cruz<\/span>, <span style=\"text-decoration: underline\">Peyman Deghanzadeh<\/span>, <span style=\"text-decoration: underline\">Pravin Gaikwad<\/span>, <u>Sudipta Paria<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">PROM: Protection against Reverse Engineering Attacks through Programmable Logic Macros<\/span>\u201d.\u00a0 <a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/3748173\">34th ACM\/SIGDA International Symposium on Field-Programmable Gate Arrays<\/a> (<span class=\"markttgsjpoa7\" data-markjs=\"true\" data-ogac=\"\" data-ogab=\"\" data-ogsc=\"\" data-ogsb=\"\">FPGA)<\/span> (<span class=\"markqruuizrmi\" data-markjs=\"true\" data-ogac=\"\" data-ogab=\"\" data-ogsc=\"\" data-ogsb=\"\">2026<\/span>). <strong>[One-Page Abstract]<\/strong><\/li>\n<li><span style=\"color: #000080\"><strong>[ISQED&#8217;26]\u00a0<\/strong><\/span><u>Habibur Rahaman<\/u>, <u>Sudipta Paria<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Evolving Landscape of Attacks on AI Hardware and Robust Defenses\u201d, to appear in Special Session on \u201cSecurity for AI and AI for Security<\/span>\u201d, in the 27<sup>th<\/sup> <a href=\"https:\/\/www.isqed.org\/\">International Symposium on Quality Electronic Design<\/a> (ISQED) (2026).\u00a0<\/li>\n<li><span style=\"color: #000080\"><strong>[GOMACTECH&#8217;26<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span>Mahmudul Hasan, Tamzidul Hoque, <u>Sudipta Paria<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">A Statistical Approach to Detecting Trojans in COTS Hardware Using Microarchitectural Events<\/span>\u201d. <a href=\"https:\/\/www.gomactech.net\/\">Government Microcircuit Applications &amp; Critical Technology<\/a> (GOMACTech) (2026).<\/li>\n<li><span style=\"color: #000080\"><strong>[GOMACTECH&#8217;26<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Habibur Rahaman<\/u>, <u>Atri Chatterjee<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">SAMURAI: Runtime Attack Detection in AI Accelerators Using AI Performance Counters<\/span>\u201d. <a href=\"https:\/\/www.gomactech.net\/\">Government Microcircuit Applications &amp; Critical Technology<\/a> (GOMACTech) (2026).<\/li>\n<li><span style=\"color: #000080\"><strong>[GOMACTECH&#8217;26<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span>Raghul Saravanan, Sai Manoj Pudukotai Dinakarrao, <u>Sudipta Paria<\/u>, <u>Aritra Dasgupta<\/u>, and <strong>Swarup Bhunia<\/strong>, &#8220;<span style=\"color: #000080\">Intelligent Graybox Fuzzing via ATPG-Guided Seed Generation and Submodule Analysis<\/span>\u201d. <a href=\"https:\/\/www.gomactech.net\/\">Government Microcircuit Applications &amp; Critical Technology<\/a> (GOMACTech) (2026).<\/li>\n<li><span style=\"color: #000080\"><strong>[GOMACTECH&#8217;26<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span>Tambiara Tabassum, <u>Dinesh Reddy Ankireddy<\/u>, <u>Sudipta Paria<\/u>, Sandip Ray, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">A System-on-Chip Instrumentation Architecture for Efficient Post-Silicon Fuzzing<\/span>\u201d. <a href=\"https:\/\/www.gomactech.net\/\">Government Microcircuit Applications &amp; Critical Technology<\/a> (GOMACTech) (2026).<\/li>\n<li><span style=\"color: #000080\"><strong>[GOMACTECH&#8217;26<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Atri Chatterjee<\/u>, <u>Habibur Rahaman<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">ASTRA: Automated Insertion of Distributed Entropy Sources for Robust Authentication<\/span>\u201d. <a href=\"https:\/\/www.gomactech.net\/\">Government Microcircuit Applications &amp; Critical Technology<\/a> (GOMACTech) (2026).<\/li>\n<li><span style=\"color: #000080\"><strong>[GOMACTECH&#8217;26<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span>Tanzim Mahfuz, Tasneem Suha, Prabuddha Chakraborty, <u>Sudipta Paria<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">XAI Enabled Power Side-Channel Estimation &amp; Mitigation in Sensitive Digital Hardware<\/span>\u201d. <a href=\"https:\/\/www.gomactech.net\/\">Government Microcircuit Applications &amp; Critical Technology<\/a> (GOMACTech) (2026).<\/li>\n<\/ul>\n<h4>2025<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[CODES+ISSS&#8217;25<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Atri Chatterjee<\/u>, <u>Habibur Rahman<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">MARVEL-PUF: A Robust Multi-Bit Memory PUF for FPGA-based Embedded Systems Security<\/span>\u201d. <a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/3742873\">International Conference on Hardware\/Software Codesign and System Synthesis<\/a> (CODES+ISSS) (2025).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/3742873.3755988\">Abstract<\/a> | <a href=\"https:\/\/dl.acm.org\/doi\/epdf\/10.1145\/3742873.3755988\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[ASEE&#8217;25<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span>Woorin Hwang, Andrea Ramirez-Salgado, <u>Rohan Reddy Kalavakonda<\/u>, Yessy Eka Ambarwati, Pavlo Antonenko, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">WIP: Empowering First-Year Engineering Students for Career Choices through Hands-On AI Hardware Experiences<\/span>\u201d. <a href=\"https:\/\/www.asee.org\/\">ASEE Annual Conference &amp; Exposition<\/a> (ASEE)(2025).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/peer.asee.org\/wip-empowering-first-year-engineering-students-for-career-choices-through-hands-on-ai-hardware-experiences\">Abstract<\/a> | <a href=\"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-content\/uploads\/sites\/689\/2026\/02\/wip-empowering-first-year-engineering-students-for-career-choices-through-hands-on-ai-hardware-experiences.pdf\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[ASEE&#8217;25<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span>Andrea Ramirez-Salgado, <strong>Swarup Bhunia<\/strong>, and Pavlo Antonenko, \u201c<span style=\"color: #000080\">Empowering Future Engineers: An Inclusive Curriculum for AIoT and Intelligent Embedded Systems<\/span>\u201d. <a href=\"https:\/\/www.asee.org\/\">ASEE Annual Conference &amp; Exposition<\/a> (ASEE) (2025).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/peer.asee.org\/board-278-nsf-iuse-empowering-future-engineers-an-inclusive-curriculum-for-aiot-and-intelligent-embedded-systems\">Abstract<\/a> | <a href=\"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-content\/uploads\/sites\/689\/2026\/02\/board-278-nsf-iuse-empowering-future-engineers-an-inclusive-curriculum-for-aiot-and-intelligent-embedded-systems.pdf\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[GOMACTECH&#8217;25<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Sudipta Paria<\/u>, <u>Aritra Dasgupta<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Post-Silicon Hardware Trojan Detection with High Confidence Leveraging Automated Test Patterns<\/span>\u201d. <a href=\"https:\/\/www.gomactech.net\/\">Government Microcircuit Applications &amp; Critical Technology<\/a> (GOMACTech) (2025).<\/li>\n<li><span style=\"color: #000080\"><strong>[GOMACTECH&#8217;25<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span>Emmanuel Elias, Tambiara Tabassum, Kshitij raj, <u>Atri Chatterjee<\/u>, <strong>Swarup Bhunia<\/strong>, and Sandip ray, \u201c<span style=\"color: #000080\">MCSE: A Low-Cost Security Engine for Protecting Edge Devices Against Supply-Chain Attacks<\/span>\u201d. <a href=\"https:\/\/www.gomactech.net\/\">Government Microcircuit Applications &amp; Critical Technology<\/a> (GOMACTech) (2025).<\/li>\n<li><span style=\"color: #000080\"><strong>[GOMACTECH&#8217;25<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span>Tanzim Mahfuz, Prabuddha Chakraborty, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">X-DFS: Explainable Artificial Intelligence Guided Design-for-Security Solution Space Exploration<\/span>&#8220;.<\/span> <a href=\"https:\/\/www.gomactech.net\/\">Government Microcircuit Applications &amp; Critical Technology<\/a> (GOMACTech) (2025).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10798618\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10798618\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[GOMACTECH&#8217;25<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Aritra Dasgupta<\/u>, <u>Sudipta Paria<\/u>, <strong>Swarup Bhunia<\/strong>, and Christopher Sozio, and Andrew Lukefahr, \u201c<span class=\"title\"><span style=\"color: #000080\">Library-Attack: Reverse Engineering Approach for Evaluating Hardware IP Protection<\/span>&#8220;. <\/span><a href=\"https:\/\/www.gomactech.net\/\">Government Microcircuit Applications &amp; Critical Technology<\/a> (GOMACTech) (2025).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/semiengineering.com\/reverse-engineering-approach-for-evaluating-hw-ip-protection-u-of-florida-indiana-u\/\">Abstract<\/a> | <a href=\"https:\/\/arxiv.org\/abs\/2501.12292\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2024<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[ISQED&#8217;24] <\/strong><\/span>Kshitij Raj,<u> Aritra Bhattacharyay<\/u>, <strong>Swarup Bhunia<\/strong>, Sandip Ray: &#8220;<span class=\"title\"><span style=\"color: #000080\">Trimming The Fat: A Minimum-Security Architecture for Protecting SoC Designs Against Supply Chain Threats<\/span>&#8220;. <a href=\"https:\/\/www.isqed.org\/English\/Archives\/2024\/index.html\">International Symposium on Quality Electronic Design<\/a> (ISQED)<\/span> (2024). <strong>[One-page Abstract]<\/strong><br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10528764\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10528764\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[GOMACTECH&#8217;24<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span>Andrea Ramirez-Salgado, Tanvir Hossain, <strong>Swarup Bhunia<\/strong>, Pavlo Antonenko, \u201c<span style=\"color: #000080\">Board 393: Supporting Hardware Engineering Career Choice in First-Year Engineering Students<\/span>\u201d. <a href=\"https:\/\/www.gomactech.net\/\">Government Microcircuit Applications &amp; Critical Technology<\/a> (GOMACTech) (2024).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/peer.asee.org\/board-393-supporting-hardware-engineering-career-choice-in-first-year-engineering-students\">Abstract<\/a> | <a href=\"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-content\/uploads\/sites\/689\/2026\/02\/board-393-supporting-hardware-engineering-career-choice-in-first-year-engineering-students.pdf\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[GOMACTECH&#8217;24<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span>Kshitij raj, <u>Atri Chatterjee<\/u>, <strong>Swarup Bhunia<\/strong>, and Sandip ray, \u201c<span style=\"color: #000080\">A Security engine Solution for Protecting SoC designs Against Supply-Chain Threats<\/span>\u201d. <a href=\"https:\/\/www.gomactech.net\/\">Government Microcircuit Applications &amp; Critical Technology<\/a> (GOMACTech) (2024).<\/li>\n<li><span style=\"color: #000080\"><strong>[GOMACTECH&#8217;24<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span>Mahmudul Hasan, Tamzidul Hoque, <u>Sudipta Paria<\/u> and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">A Statistical Approach to Detecting Trojans in COTS Hardware Using Microarchitectural Events<\/span>\u201d. <a href=\"https:\/\/www.gomactech.net\/\">Government Microcircuit Applications &amp; Critical Technology<\/a> (GOMACTech) (2024).<\/li>\n<li><span style=\"color: #000080\"><strong>[GOMACTECH&#8217;24<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Christopher vega<\/u>, Patanjali SlPSK, <u>Ravalika Karnati<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">VARI-CHECK: Authentication of CoTS devices using ML-Based variability Characterization<\/span>\u201d. <a href=\"https:\/\/www.gomactech.net\/\">Government Microcircuit Applications &amp; Critical Technology<\/a> (GOMACTech) (2024).<\/li>\n<li><span style=\"color: #000080\"><strong>[GOMACTECH&#8217;24<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Aritra Dasgupta<\/u>, Jackson Fugate, Greg Stitt, <strong>Swarup Bhunia<\/strong>, Nij Dorairaj, and David Kehlet, \u201c<span style=\"color: #000080\">RIPPER: Low-overhead Fine-grain redaction Tool Flow for hardware IP Protection<\/span>\u201d. <a href=\"https:\/\/www.gomactech.net\/\">Government Microcircuit Applications &amp; Critical Technology<\/a> (GOMACTech) (2024).<\/li>\n<\/ul>\n<h4>2023<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[GOMACTECH&#8217;23<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span>Maneesh Merugu, <u>Md Moshiur Rahman<\/u>, <u>Aritra dasgupta<\/u>, <strong>Swarup Bhunia<\/strong>, and Sandip Ray, \u201c<span style=\"color: #000080\">Formal equivalence checking for locked and Redacted Hardware designs<\/span>\u201d. <a href=\"https:\/\/www.gomactech.net\/\">Government Microcircuit Applications &amp; Critical Technology<\/a> (GOMACTech) (2023).<\/li>\n<li><span style=\"color: #000080\"><strong>[GOMACTECH&#8217;23<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Christopher vega<\/u>, <u>Patanjali SLPSK<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">IOLock: An Input\/Output Protection Scheme for Chip and PCB Protection<\/span>\u201d.\u00a0 <a href=\"https:\/\/www.gomactech.net\/\">Government Microcircuit Applications &amp; Critical Technology<\/a> (GOMACTech) (2023).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10354011\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10354011\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[GOMACTECH&#8217;23<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Aritra dasgupta<\/u>, <u>Md Moshiur Rahman<\/u>, Patanjali SLPSK, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Low-overhead Hardware Redaction Using Bitstream Compaction<\/span>\u201d. <a href=\"https:\/\/www.gomactech.net\/\">Government Microcircuit Applications &amp; Critical Technology<\/a> (GOMACTech) (2023).<\/li>\n<li><span style=\"color: #000080\"><strong>[GOMACTECH&#8217;23<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Rasheed Almawzan<\/u>, <u>Reiner Dizon-Paradis<\/u>, <u>Aritra dasgupta<\/u>, Dipal Halder, Md Moshiur Rahman, Maneesh Merugu, Sandip Ray, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">OASIS: A Layered IP Protection Framework for Structured ASIC<\/span>\u201d. <a href=\"https:\/\/www.gomactech.net\/\">Government Microcircuit Applications &amp; Critical Technology<\/a> (GOMACTech) (2023).<\/li>\n<li><span style=\"color: #000080\"><strong>[GOMACTECH&#8217;23<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span>Jackson Fugate, Greg Stitt, <u>Naren vikram Raj Masna<\/u>, <u>Aritra Dasgupta<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">ATPG and Test Methods for Redacted IP<\/span>\u201d. <a href=\"https:\/\/www.gomactech.net\/\">Government Microcircuit Applications &amp; Critical Technology<\/a> (GOMACTech) (2023). <br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10139957\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?arnumber=10139957\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[GOMACTECH&#8217;23<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span>Andrea Ramirez-Salgado, Tanvir Hossain, Tamzidul Hoque, <strong>Swarup Bhunia<\/strong>, Mary Koroly, Bradford Davey, Pavlo Antonenko, \u201c<span style=\"color: #000080\">Board 265: Engaging Students in Exploring Computer Hardware Fundamentals Using FPGA Board Games<\/span>\u201d. <a href=\"https:\/\/www.gomactech.net\/\">Government Microcircuit Applications &amp; Critical Technology<\/a> (GOMACTech) (2023).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/peer.asee.org\/board-265-engaging-students-in-exploring-computer-hardware-fundamentals-using-fpga-board-games\">Abstract<\/a> | <a href=\"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-content\/uploads\/sites\/689\/2026\/02\/board-265-engaging-students-in-exploring-computer-hardware-fundamentals-using-fpga-board-games.pdf\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2020<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[GOMACTECH&#8217;20<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Tamzidul Hoque<\/u>, <u>Shuo Yang<\/u>, <u>Aritra Bhattacharya<\/u>, <u>Jonathan W Cruz<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">An Automated Framework for Board-level Trojan Benchmarking<\/span>&#8220;.<\/span> <a href=\"https:\/\/www.gomactech.net\/\">Government Microcircuit Applications &amp; Critical Technology<\/a> (GOMACTech) (2020).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9785666\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9785666\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[GOMACTECH&#8217;20<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Jonathan W Cruz<\/u>, Abhishek Nair, <u>Tamzidul Hoque<\/u>, <u>Prabuddha Chakraborty<\/u>, <u>Pravin Gaikwad<\/u>, <u>Naren Masna<\/u>, and <strong>Swarup Bhunia<\/strong>, Brian Dupaix, and Waleed Khalil, \u201c<span style=\"color: #000080\">MIMIC: A Machine Intelligence Based Trojan Benchmarking Framework<\/span>\u201d. <a href=\"https:\/\/www.gomactech.net\/\">Government Microcircuit Applications &amp; Critical Technology<\/a> (GOMACTech) (2020).<\/li>\n<li><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10022234\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10022234\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[GOMACTECH&#8217;20<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Moshiur Rahman<\/u>, Travis Meade, Yier Jin, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">You Break I Fix: A Collaborative Approach for Strengthening Sequential Obfuscation of Hardware Intellectual Property<\/span>\u201d. <a href=\"https:\/\/www.gomactech.net\/\">Government Microcircuit Applications &amp; Critical Technology<\/a> (GOMACTech) (2020).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/apps.dtic.mil\/sti\/html\/tr\/AD1102303\/\">Abstract<\/a> | <a href=\"https:\/\/apps.dtic.mil\/sti\/tr\/pdf\/AD1102303.pdf\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[GOMACTECH&#8217;20<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span>Chris Taylor, <strong>Swarup Bhunia<\/strong>, Brian Dupaix, and Waleed Khalil, \u201c<span style=\"color: #000080\">A Structural Analysis of Logic Locking<\/span>\u201d. <a href=\"https:\/\/www.gomactech.net\/\">Government Microcircuit Applications &amp; Critical Technology<\/a> (GOMACTech) (2020).<\/li>\n<li><span style=\"color: #000080\"><strong>[GLSVLSI&#8217;20<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Tamzidul Hoque<\/u>, <u>Patanjali SLPSK<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Trust Issues in COTS: The Challenges and Emerging Solution<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/3386263\">ACM Great Lakes Symposium on VLSI<\/a> (GLSVLSI): 211-216 (2020)<strong><br \/><\/strong><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/3386263.3407654\">Abstract<\/a> | <a href=\"https:\/\/dl.acm.org\/doi\/epdf\/10.1145\/3386263.3407654\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[HOST&#8217;20<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span>Domenic Forte, <strong>Swarup Bhunia<\/strong>, Ramesh Karri, Jim Plusquellic and Mark Tehranipoor, \u201c<span style=\"color: #000080\">IEEE International Symposium on Hardware Oriented Security and Trust (HOST): Past, Present, and Future<\/span><span class=\"title\">&#8220;. <\/span><span class=\"title\"><a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/9300124\/proceeding\">IEEE International Symposium on Hardware Oriented Security and Trust<\/a> (HOST): <\/span>1-4 (2020)<strong><br \/><\/strong><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9000111\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=9000111\">PDF<\/a>]<\/span><\/span><strong><br \/><\/strong><\/li>\n<\/ul>\n<h4>2019<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[TECHON&#8217;19<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Prabuddha Chakraborty<\/u> and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">HASTE: Software Security Analysis for Timing Attacks on Clear Hardware Assumption<\/span>&#8220;. <\/span><a href=\"https:\/\/www.src.org\/\">SRC TECHCON<\/a> (TECHCON) (2019).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/www.academia.edu\/125615968\/HASTE_Software_Security_Analysis_for_Timing_Attacks_on_Clear_Hardware_Assumption\">Abstract<\/a> | <a href=\"https:\/\/www.ece.ufl.edu\/wp-content\/uploads\/sites\/119\/publications\/esl21.pdf\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[TECHON&#8217;19<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Atul Prasad Debnath<\/u>, <strong>Swarup Bhunia<\/strong>, and Sandip Ray, &#8220;<span class=\"title\"><span style=\"color: #000080\">A Flexible Architecture for Systematic Implementation of SoC Security Policies<\/span>&#8220;. <\/span><a href=\"https:\/\/www.src.org\/\">SRC TECHCON<\/a> (TECHCON) (2019).<\/li>\n<li><span style=\"color: #000080\"><strong>[VTS&#8217;19<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span>Nagmeh Karimi, Jeyavijayan Rajendran, Hassan Salmani, <span style=\"text-decoration: underline\">Tamzidul Hoque<\/span>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Special Session: Countering IP Security threats in Supply chain<\/span>&#8220;.<\/span> <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/8753115\/proceeding\">IEEE VLSI Test Symposium<\/a> (VTS): 1-9 (2019).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8758633\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=8758633\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[DAC&#8217;19<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Jonathan Cruz<\/u>, Prabhat Mishra, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">The Metric Matters: The Art of Measuring Trust in Electronics<\/span>&#8220;. <\/span><a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/3316781\">Design Automation Conference<\/a> (DAC): 222 (2019).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8807020\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=8807020\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[ICCE&#8217;19<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Shuo Yang<\/u>, <u>Abdulrahman Alaql<\/u>, <u>Tamzidul Hoque<\/u>, and <strong>Swarup Bhunia<\/strong>, &#8220;<span class=\"title\"><span style=\"color: #000080\">Runtime Integrity Verification in Cyber-physical Systems using Side-Channel Fingerprint<\/span>&#8220;.<\/span> <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/8656627\/proceeding\">IEEE International Conference on Consumer Electronics<\/a> (ICCE): 1-6 (2019).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8662071\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=8662071\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[GOMACTECH&#8217;19<\/strong><\/span><u><span style=\"color: #000080\"><strong>]<\/strong><\/span><\/u> <u>Atul Prasad Debnath<\/u>, Srivalli Boddupalli, <strong>Swarup Bhunia<\/strong>, and Sandip Ray, \u201c<span style=\"color: #000080\">ARK: Architecture for Security Resiliency in SoC Designs with NetworK-on-Chip (NoC) Fabrics<\/span>\u201d. <a href=\"https:\/\/www.gomactech.net\/\">Government Microcircuit Applications &amp; Critical Technology<\/a> (GOMACTech) (2019).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/apps.dtic.mil\/sti\/citations\/tr\/AD1075248\">Abstract<\/a> | <a href=\"https:\/\/apps.dtic.mil\/sti\/tr\/pdf\/AD1075248.pdf\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2018<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[TECHCON&#8217;18] <\/strong><\/span><u>Tamzidul Hoque<\/u> and <strong>Swarup Bhunia<\/strong>, &#8220;<span style=\"color: #000080\">A Systematic Machine Learning Framework for IP Trust Verification<\/span>\u201d. <a href=\"https:\/\/www.src.org\/\">SRC TECHCON<\/a> (TECHCON), Austin, TX, USA, Sept 2018.<\/li>\n<li><span style=\"color: #000080\"><strong>[GOMACTECH&#8217;18] <\/strong><\/span><u>Daniel Capecci<\/u>, Gustavo Contreras, Domenic Forte, Mark Tehranipoor, and <strong>Swarup Bhunia<\/strong>, \u201cAutomated SoC Security from Design to Fabrication\u201d. <a href=\"https:\/\/www.gomactech.net\/\">Government Microcircuit Applications &amp; Critical Technology<\/a> (GOMACTech) (2018).<\/li>\n<\/ul>\n<h4>2017<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[GLSVLSI&#8217;17<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span>Sarah Amir, Bicky Shakya, Domenic Forte, Mark Tehranipoor, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Comparative Analysis of Hardware Obfuscation for IP Protection<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/www.glsvlsi.org\/archive\/glsvlsi17\/index.html\">ACM Great Lakes Symposium on VLSI<\/a> (GLSVLSI): 363-368 (2017)<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/3060403.3060495\">Abstract<\/a> | <a href=\"https:\/\/dl.acm.org\/doi\/epdf\/10.1145\/3060403.3060495\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[HILTON-HEAD&#8217;17<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span>[Abstract &amp; Poster Presentation] Cheng Chen, <strong>Swarup Bhunia<\/strong>, Soumyajit Mandal and Fengchao Zhang, \u201c<span style=\"color: #000080\">Broadband Quantitative NQR Analysis of Medicines and Nutritional Supplements<\/span>&#8220;, <a href=\"https:\/\/panicnmr.com\/\">Practical Applications of NMR in Industry Conference<\/a> (PANIC), Hilton Head Island, USA, 2017.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/www.sciencedirect.com\/science\/article\/pii\/S1090780717300745?via%3Dihub\">Abstract<\/a> | <a href=\"https:\/\/pdf.sciencedirectassets.com\/272577\/1-s2.0-S1090780717X00037\/1-s2.0-S1090780717300745\/main.pdf?X-Amz-Security-Token=IQoJb3JpZ2luX2VjEBYaCXVzLWVhc3QtMSJHMEUCIGCkdbLmF6987UAU9luIX4xdo9UhhkYdYO5JWjLFZ%2Bs%2BAiEA5imytoJCacATlDY0yGmnQMK8en%2FYQXc%2BFKIWl9nXz64qvAUI3%2F%2F%2F%2F%2F%2F%2F%2F%2F%2F%2FARAFGgwwNTkwMDM1NDY4NjUiDLXWeocdkwTxkCnS6CqQBScOHoZZ%2FeGozjwTLH48qPkxqe%2BfJX9BOZaiN7vNsPSXjlMh538W7TUZ%2FvQy9BQs3ln1eWUAObesFdi7EPgcCxJVtI9jMP6yK3rJghKeA5iuGDMFN95WTRSwLL2IBHtrKAZ0DemW2w2z7Mt%2Fr8CZDlaK4vWvauG30QZ61sTHEKITHFI3%2BeCoVIXmtodMVIci7hwwvu1%2FzecN7mcJh7RlGvtUyH5QLidT9JMIqX4Rd8%2B%2BQAMPeLT25x8SFnTMOUV%2FjAMQ0ssoV9Vni%2B1cEu02G1WNPEgaabdSvYlWqGZSxL0Qr0QDmyfMJEZBxAy4nCejKx3dcGKNFO3Nj6ofHLsZteJcTHC2Emy4%2FIfYrtbtQ%2BSnCx5%2Bf1sA%2Fn59jjcbC4kHd8exSy%2B9foK3pAtUGHtPJmIsycHWb%2B5dlR77fvcxZd7NRnZdl20UfQDqij20NBOWJo5gLRIsFLguTszBVrD6%2FyL9glZA8gH0PZ6uCQ2noHqCGJIX3e8LgwrUAeGaxTZumi5FjooYODQNU4%2BcSyE63ZFxTEbmzF98c6%2B9dKnmJ6RcUK3y%2F1hJUmh0wxP5ioULH0KK5PuicTy4dnGnCepiozWIUSi70cyksmh%2ByMQ01tv2q0xXxKq1hhTk0loNpVEj%2BbOuGV8f5czqqdXUh%2Fv%2FQ0dozYSdI%2F2AzWFSFD4dpCuXQw7R8pP83PxRXYn8%2Fa0VOWtQhANzF8L4CDiDQ%2BIn%2BDP0Cko6F4Br04CbygHWQ4Y8GYYmYgdv7%2FHeoqy9zyt7qaCL3mE6eS9JnAFPWWyMNrGsek1zoCAidwGS3am8GuK%2FQ%2FsQJtIq8B7CYUnLhbYp2bCxXhqejoe1gmEljIz%2FuADWzc0fzTTllJJonKZAH7r6MK%2BOucwGOrEB1da1JKrrTHG%2BgL8B2keUmpwBtgNifKgHVFtYcM6sEfAqnq1OGz07xnhchIaXMyyVeXvKGeSK03kZd%2B9qhnpZWv3HwLgZFDVOmRVw8%2FaFAj%2BxtbKWfOsDK%2B%2Bb8NBE8pM5sXitgKsqB7Y5R0voRrPA%2FF9nj0CIr%2BWyzb6EeGjcGp3o%2FosGrxTxC7FFTMgELwgPP3i%2BWrtgDsufTsVMAAQXVqXkLOxTp9K3mbcuDrgohi1u&amp;X-Amz-Algorithm=AWS4-HMAC-SHA256&amp;X-Amz-Date=20260212T225521Z&amp;X-Amz-SignedHeaders=host&amp;X-Amz-Expires=300&amp;X-Amz-Credential=ASIAQ3PHCVTYXSHGKXVX%2F20260212%2Fus-east-1%2Fs3%2Faws4_request&amp;X-Amz-Signature=d6b5c99c82a565e1ef42e1f24627cdd4138e299a4396de878f826e7b8690c07b&amp;hash=d1bb89547976ecac0a36031f427b1a179e55326c8d14051ef591b623bc1f7c53&amp;host=68042c943591013ac2b2430a89b270f6af2c76d8dfd086a07176afe7c76c2c61&amp;pii=S1090780717300745&amp;tid=spdf-d9ed21f1-3549-4e68-896a-a243be80ff39&amp;sid=32e8b1a93624a6414318b820aa6e1ad7d576gxrqa&amp;type=client&amp;tsoh=d3d3LnNjaWVuY2VkaXJlY3QuY29t&amp;rh=d3d3LnNjaWVuY2VkaXJlY3QuY29t&amp;ua=111457050105000d57&amp;rr=9ccfac4e3b1e2af6&amp;cc=us\">PDF<\/a>]\u00a0<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[TECHCON&#8217;17<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Tamzidul Hoque<\/u>, Prabhat Mishra, and <strong>Swarup Bhunia<\/strong>, &#8220;<span style=\"color: #000080\">A Systemic Feature Extraction Methodology for Machine Learning Based Hardware Trojan Detection<\/span>\u201d. <a href=\"https:\/\/www.src.org\/\">SRC TECHCON<\/a> (TECHCON), Austin, TX, USA, Sept 2017.<\/li>\n<li><span style=\"color: #000080\"><strong>[TECHCON&#8217;17<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Atul Prasad Debnath<\/u>, Sandip Ray, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">An Adaptable System-on-Chip Security Architecture for Internet of Things Applications<\/span>&#8220;.<\/span> <a href=\"https:\/\/www.src.org\/\">SRC TECHCON<\/a> (TECHCON), Austin, TX, USA, Sept 2017.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/chapter\/10.1007\/978-3-030-02807-7_4?utm_source=researchgate.net&amp;utm_medium=article\">Abstract<\/a> ]<\/span><\/span><\/li>\n<\/ul>\n<h4>2016<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[ICCD&#8217;16<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span>Sandip Ray, <u>Tamzidul Hoque<\/u>, <u>Abhishek Basak<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">The power play: Security-Energy Trade-offs in the IoT Regime<\/span>&#8220;.<\/span> <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/7742853\/proceeding\">IEEE International Conference on Computer Design<\/a> (ICCD): 690-693(2016)<strong><br \/><\/strong><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/www.sciencedirect.com\/science\/article\/pii\/S1090780717300745?via%3Dihub\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7753360\">PDF<\/a>]<\/span><\/span><strong><br \/><\/strong><\/li>\n<li><span style=\"color: #000080\"><strong>[FPGA&#8217;16] <\/strong><\/span><u>Wenchao Qian<\/u>, <u>Christopher Babecki<\/u>, <u>Robert Karam<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">ENFIRE: An Energy-efficient Fine-grained Spatio-temporal Reconfigurable Computing Fabric<\/span>&#8221; (Abstact Only). <a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/2847263\">ACM\/SIGDA International Symposium on Field-Programmable Gate Arrays<\/a> (FPGA)<\/span>: 275 (2016). <strong>[One-page Abstract]<\/strong><br \/><span style=\"color: #ff6600\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7499840\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7499840\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[TECHCON&#8217;16<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Fengchao Zhang<\/u>, <u>Abhishek Basak<\/u>, Sandip Ray, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Design-for-Debug Architecture Enhances SoC Security<\/span>\u201d. <a href=\"https:\/\/www.src.org\/calendar\/e005107\/\">SRC TECHCON<\/a> (TECHCON), Austin, TX, USA, Sept 2016.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/2897937.2898020\">Abstract<\/a> | <a href=\"https:\/\/dl.acm.org\/doi\/epdf\/10.1145\/2897937.2898020\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[TECHCON&#8217;16<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Robert Karam<\/u> and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Energy-Efficient Memory-Centric Reconfigurable Accelerator for Data Intensive Analytics<\/span>\u201d. <a href=\"https:\/\/www.src.org\/calendar\/e005107\/\">SRC TECHCON<\/a> (TECHCON), Austin, TX, USA, Sept 2016.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/2997649\">Abstract<\/a> | <a href=\"https:\/\/dl.acm.org\/doi\/epdf\/10.1145\/2997649\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[TECHCON&#8217;16<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Tamzidul Hoque,<\/u> <u>Robert Karam,<\/u> and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Protection of IPs Mapped to FPGAs against Malicious Hardware<\/span>\u201d. <a href=\"https:\/\/www.src.org\/calendar\/e005107\/\">SRC TECHCON<\/a> (TECHCON), Austin, TX, USA, Sept 2016.<\/li>\n<li><span style=\"color: #000080\"><strong>[VTS&#8217;16<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span>Sandip Ray, <strong>Swarup Bhunia<\/strong>, Yier Jin, and Mark Tehranipoor, \u201c<span class=\"title\"><span style=\"color: #000080\">Security Validation in IoT space<\/span>&#8220;. <\/span><a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/7469602\/proceeding\">IEEE VLSI Test Symposium<\/a> (VTS): 1 (2016)<strong><br \/><\/strong><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7477288\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7477288\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[GLSVLSI&#8217;16<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Robert Karam<\/u>, Rui Liu, Pai-Yu Chen, Shimeng Yu, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Security Primitive Design with Nanoscale Devices: A Case Study with Resistive RAM<\/span>&#8220;.<\/span>\u00a0<a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/2902961\">ACM Great Lakes Symposium on VLSI<\/a> (GLSVLSI): 299-304 (2016).<strong><br \/><\/strong><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/2902961.2903042\">Abstract<\/a> | <a href=\"https:\/\/dl.acm.org\/doi\/epdf\/10.1145\/2902961.2903042\">PDF<\/a>]\u00a0\u00a0<\/span><\/span><strong><br \/><\/strong><\/li>\n<li><span style=\"color: #000080\"><strong>[EUS&#8217;16<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Robert Karam<\/u>, Steve Majerus, Swarup Bhunia, Steven Brose, Margot S. Damaser, and Dennis Bourbeau, \u201c<span style=\"color: #000080\">Autonomous closed-loop genital nerve stimulation identifies and inhibits hyper-reflexic bladder contractions<\/span>\u201d. <a href=\"https:\/\/engineering-urology.org\/\">Engineering and Urology Society<\/a> (EUS) (2016).<\/li>\n<\/ul>\n<h4>2015<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[DAC&#8217;15<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span>Sandip Ray, Jin Yang, <u>Abhishek Basak<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Correctness and Security and Odds: Post-silicon Validation of Modern SoC Designs<\/span>\u201d. <a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/2744769\">Design Automation Conference<\/a> (DAC) (2015). [Invited article in Special Session on \u201cSoC Security Validation\u201d].<strong> [Invited Full Paper]<br \/><\/strong><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7167332\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7167332\">PDF<\/a>]<\/span><\/span><strong><br \/><\/strong><\/li>\n<li><span style=\"color: #000080\"><strong>[TECHCON&#8217;15<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Abhishek Basak<\/u>, Sandip Ray, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">A Centralized Flexible Infrastructure for Systematic Implementation of SoC Security Policies<\/span>\u201d, SRC TECHCON (TECHCON), Austin, TX, USA, Sept 2015.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7372616\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7372616\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[EUS&#8217;15<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span>Irene Makovey, <u>Robert Karam<\/u>, Steve Majerus, Dennis Bourbeau, Hui Zhu, <strong>Swarup Bhunia<\/strong>, Margot S. Damaser, \u201c<span style=\"color: #000080\">Event Detection Algorithm in Single Channel Bladder Pressure Recording<\/span>\u201d. <a href=\"https:\/\/engineering-urology.org\/\">Engineering and Urology Society<\/a> (EUS) (2015).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/abstract\/document\/7592043\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7592043\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[MWSCAS&#8217;15<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Robert Karam<\/u>, <u>Kai Yang<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Energy-efficient Reconfigurable Computing using Spintronic Memory<\/span>&#8220;.<\/span> \u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/7269503\/proceeding\">IEEE International Midwest Symposium on Circuits and Systems<\/a> (MWSCAS): 1-4 (2015).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7282213\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7282213\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[ICM&#8217;15<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Robert Karam<\/u>, Dennis Bourbeau, Steve Majerus, Iryna Makovey, Howard B. Goldman, Margot S. Damaser, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Real-Time Contraction Event Detection from Bladder Pressure Recordings for Effective Diagnosis and Treatment of Urinary Incontinence<\/span>\u201d. <a href=\"https:\/\/www.ics.org\/2026\">Innovating for Continence Meeting<\/a> (ICM) (2015).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7208819\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7208819\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2014<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[ICICDT&#8217;14<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Somnath Paul<\/u>, Saibal Mukhopadhyay, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Robust Low-power Reconfigurable Computing with a Variation-aware Preferential Design Approach<\/span>&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/6832295\/proceeding\">IEEE International Conference on Integrated Circuit Design and Technology<\/a> (ICICDT) <\/span>: 1-6 (2014).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6838621\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6838621\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[DATE&#8217;14<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><strong>Swarup Bhunia<\/strong>, <u>Vaishnavi Ranganathan<\/u>, Tina He, Srihari Rajgopal, Rui Wang, Mehran Mehregany and Philip Feng, \u201c<span class=\"title\"><span style=\"color: #000080\">Toward ultralow-power computing at exteme with silicon carbide (SiC) nanoelectromechanical logic<\/span>&#8220;.<\/span> <a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.5555\/2616606\">Design, Automation and Test in Europe Conference<\/a> (DATE): 1-6 (2014).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6800447\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6800447\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[DATE&#8217;14<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Somnath Paul<\/u>, <u>Robert Karam<\/u>,<strong> Swarup Bhunia<\/strong>, and Ruchir Puri, \u201c<span class=\"title\"><span style=\"color: #000080\">Energy-efficient hardware acceleration through computing in the memory<\/span>&#8220;.<\/span> <a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.5555\/2616606\">Design, Automation and Test in Europe Conference<\/a> (DATE): 1-6 (2014).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6800480\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6800480\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2013<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[MTV&#8217;13<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><strong>Swarup Bhunia <\/strong>and <u>Abhishek Basak<\/u>, \u201c<span class=\"title\"><span style=\"color: #000080\">Secure and Trusted SoC: Challenges and Emerging Solutions<\/span>&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/6923034\/proceeding\">International Workshop on Microprocessor Test and Verification<\/a> (MTV)<\/span>: 29-34 (2013).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6926097\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6926097\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[MWSCAS&#8217;13<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Abhishek Basak<\/u>, <u>Yu Zheng<\/u>, Jangwon Park, Jongsun Park, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Reconfigurable ECC for adaptive protection of memory<\/span>&#8220;.<\/span> \u00a0<a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/6653322\/proceeding\">IEEE International Midwest Symposium on Circuits and Systems<\/a> (MWSCAS): 1085-1088 (2013).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6674841\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6674841\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2011<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[ICCD&#8217;11<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Xinmu Wang<\/u>, <u>Seetharam Narasimhan<\/u>, <u>Aswin Krishna<\/u>, <u>Tatini Mal-Sarkar<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Sequential Hardware Trojan Attacks: Experiences from ESC 2010<\/span>\u201d. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/6066261\/proceeding\">29th IEEE International Conference on Computer Design<\/a> (ICCD) (2011). [Special session \u201cCapture the Chip\u201d] <strong>[Invited Full Paper]<br \/><\/strong><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6081413\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6081413\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[MWSCAS&#8217;11<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span>Hadi Hajimiri, <u>Somnath Paul<\/u>, <u>Anandaroop Ghosh<\/u>, <strong>Swarup Bhunia<\/strong>, and Prabhat Mishra, \u201c<span style=\"color: #000080\">Reliability Improvement in Many-Core Architectures through Computing in Embedded Memory<\/span>\u201d. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/6019810\/proceeding\">IEEE International Midwest Symposium on Circuits and Systems<\/a> (MWSCAS) (2011). [Special session on self-healing circuits in scaled technologies]. <strong>[Invited Full Paper]<br \/><\/strong><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/6026672\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=6026672\">PDF<\/a>]<\/span><\/span><\/li>\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>FPGA&#8217;11] <\/strong><\/span><u>Somnath Paul<\/u> and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Memory based computing: reshaping the fine-grained logic in a reconfigurable framework<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/1950413\">ACM\/SIGDA International Symposium on Field-Programmable Gate Arrays<\/a> (FPGA)<\/span>: 283 (2011). <strong>[One-page Abstract]<\/strong><br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/1950413.1950481\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=7051284\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[TFMN&#8217;11<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span>Srihari Rajgopal, Philip X.-L. Feng, <strong>Swarup Bhunia<\/strong> and Mehran Mehregany, \u201c<span style=\"color: #000080\">Nano Manufacturing of SiC Circuits \u2014 Nanomechanical Logic and NEMS-JFET Integration<\/span>\u201d. <a href=\"https:\/\/www.transducer-research-foundation.org\/archive\/mfg2011\/\">Technologies for Future Micro-Nano Manufacturing Workshop<\/a> (TFMN) (2011). [Invited 2-page abstract]<\/li>\n<\/ul>\n<h4>2010<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[ASQED&#8217;10<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Seetharam Narasimhan<\/u>, Jongsun Park, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Digital Signal Processing in Bio-implantable Systems: Design Challenges and Emerging Solutions<\/span>\u201d. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/5543927\/proceeding\">Asia Symposium on Quality Electronic Design<\/a> (ASQED) (2010). [Invited paper in special session on bio-sensing and bio-system design]. <strong>[Invited Full Paper]<\/strong><br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5548247\/\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5548247\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[VTS&#8217;10<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span>Swarup Bhunia and Anand Raghunathan, \u201c<span class=\"title\"><span style=\"color: #000080\">Special session 11B: Hot topic hardware security: Design, test and verification issues<\/span>&#8220;.<\/span> <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/5464131\/proceeding\">IEEE VLSI Test Symposium<\/a> (VTS): 349 (2010).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5469534\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5469534\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2009<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[HLDVT&#8217;09<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Rajat Subhra Chakraborty<\/u>, <u>Seetharam Narasimhan<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span class=\"title\"><span style=\"color: #000080\">Hardware Trojan: Threats and emerging solutions<\/span>&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/5331931\/proceeding\">IEEE International High-Level Design Validation and Test Workshop<\/a> (HLDVT)<\/span>: 166-171 (2009).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5340158\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5340158\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[NANOARCH&#8217;09<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><u>Somnath Paul<\/u> and <strong>Swarup Bhunia<\/strong>, &#8220;<span style=\"color: #000080\">Computing with nanoscale memory: Model and architecture<\/span>&#8220;. <a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.5555\/1936810\">IEEE\/ACM International Symposium on Nanoscale Architectures (NANOARCH)<\/a>: 1-6 (2009).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5226362\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5226362\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2008<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[ISLPED&#8217;08<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><strong>Swarup Bhunia<\/strong> and Kaushik Roy, &#8220;<span class=\"title\"><span style=\"color: #000080\">Low power design under parameter variations<\/span>&#8220;. <a href=\"https:\/\/dl.acm.org\/doi\/proceedings\/10.1145\/1393921\">IEEE\/ACM International Symposium on Low Power Electronics and Design <\/a>(ISLPED)<\/span>: 137-138 (2008).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4641552\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4641552\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2007<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><span style=\"color: #000080\"><strong>[ITC&#8217;07<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><strong>Swarup Bhunia<\/strong> and Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">Power dissipation, variations and nanoscale CMOS design: Test challenges and self-calibration\/self-repair solutions<\/span>&#8220;.<\/span> <span class=\"title\"><a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/4437545\/proceeding\">International Test Conference<\/a> (ITC)<\/span>: 1-10 (2007).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4437659\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4437659\">PDF<\/a>]<\/span><\/span><\/li>\n<li><span style=\"color: #000080\"><strong>[VLSID&#8217;07<\/strong><\/span><span style=\"color: #000080\"><strong>] <\/strong><\/span><strong>Swarup Bhunia<\/strong>, Saibal Mukhopadhyay, and Kaushik Roy, \u201c<span class=\"title\"><span style=\"color: #000080\">Process Variations and Process-Tolerant Design<\/span>&#8220;. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/conhome\/4091978\/proceeding\">International Conference on VLSI Design<\/a> (VLSID)<\/span>: 699-704 (2007).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/4092123\/\">Abstract<\/a> | <a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=4092123\">PDF<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2006<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><u><span style=\"color: #000080\"><strong>[<\/strong><\/span><\/u><span style=\"color: #000080\"><strong>ECS&#8217;06] <\/strong><\/span>Massood Tabib-Azar, <strong>Swarup Bhunia<\/strong>, and Daniel Saab, \u201c<span style=\"color: #000080\">Complimentary Nano-Electromechanical Carbon Nanotube Switches<\/span>\u201d. <a href=\"https:\/\/iopscience.iop.org\/journal\/2151-2043\">ECS Meeting Abstracts<\/a> (ECS) (2006).<br \/><span style=\"font-size: 1.25rem\"><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/iopscience.iop.org\/article\/10.1149\/1.2357277\">Abstract<\/a> | <a href=\"https:\/\/iopscience.iop.org\/article\/10.1149\/MA2006-02\/49\/2138\/pdf\">PDF<\/a>]<\/span><\/span><\/span><\/li>\n<\/ul>\n<\/div><div class=\"accordion-btn-wrap\"><\/div><\/div><\/div><\/div><\/div>\n\n\n\n<div class=\"wp-block-create-block-accordion-block-inner\"><div class=\"accordion-item\"><span class=\"accordion-header\" id=\"heading8babb828-6da0-4809-a59b-1fcb677a1f4c\"><button class=\"accordion-button collapsed\" type=\"button\" data-bs-toggle=\"collapse\" data-bs-target=\"#collapse8babb828-6da0-4809-a59b-1fcb677a1f4c\" aria-expanded=\"false\" aria-controls=\"8babb828-6da0-4809-a59b-1fcb677a1f4c\">Books<\/button><\/span><div id=\"collapse8babb828-6da0-4809-a59b-1fcb677a1f4c\" class=\"accordion-collapse collapse\" aria-labelledby=\"heading8babb828-6da0-4809-a59b-1fcb677a1f4c\"><div class=\"accordion-body\"><div class=\"accordion-body-wrap\">\n<h4>2026<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong>Swarup Bhunia<\/strong> and Mark M. Tehranipoor, \u201c<span style=\"color: #000080\">Hardware Security: A Hands-on Learning Approach<\/span>\u201d, Elsevier, Morgan Kaufmann, <strong><span style=\"background-color: #ffff00\">[Text Book]<\/span> 2<sup>nd <\/sup>Edition<\/strong>, USA, in press, to be published in April 2026.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/shop.elsevier.com\/books\/hardware-security\/bhunia\/978-0-443-18754-4\">Article<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2018<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong>Swarup Bhunia<\/strong> and Mark M. Tehranipoor, \u201c<span style=\"color: #000080\">Hardware Security: A Hands-on Learning Approach<\/span>\u201d, Elsevier, Morgan Kaufmann, <strong><span style=\"background-color: #ffff00\">[Text Book]<\/span> 1<sup>st <\/sup>Edition<\/strong>, USA, November, 2018.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/www.sciencedirect.com\/book\/monograph\/9780128124772\/hardware-security\">Article<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2017<\/h4>\n<ul style=\"list-style-type: circle\">\n<li>Sandip Ray, <u>Abhishek Basak<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Security Policy in System-on-Chip &#8211; Specification, Implementation and Verification<\/span>&#8220;, Springer USA, December, 2017.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-3-319-93464-8\">Article<\/a>]<\/span><\/span><\/li>\n<li><strong>Swarup Bhunia<\/strong> and Mark M. Tehranipoor (Eds.), \u201c<span style=\"color: #000080\">The Hardware Trojan War: Attacks, Myths, and Defenses<\/span>\u201d, Springer, New York, USA, December 2017.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.5555\/3202478\">Article<\/a>]<\/span><\/span><\/li>\n<li><strong>Swarup Bhunia<\/strong>, Sandip Ray, and Susmita Sur-Kolay (Eds.), \u201c<span style=\"color: #000080\">Fundamentals of IP and SoC Security: Design, Verification and Debug<\/span>\u201d, Springer, New York, USA, May 2017.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-3-319-50057-7\">Article<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2016<\/h4>\n<ul style=\"list-style-type: circle\">\n<li>Mark M. Tehranipoor, Domenic Forte, Garrett S. Rose, and <strong>Swarup Bhunia<\/strong> (Eds.), \u201c<span style=\"color: #000080\">Security Opportunities in Nano Devices and Emerging Technologies<\/span>\u201d, CRC Press, USA, December 2016.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/www.taylorfrancis.com\/books\/edit\/10.1201\/9781315265056\/security-opportunities-nano-devices-emerging-technologies-mark-tehranipoor-domenic-forte-swarup-bhunia-garrett-rose\">Article<\/a>]<\/span><\/span><\/li>\n<li>Prabhat Mishra, <strong>Swarup Bhunia<\/strong>, and Mark M. Tehranipoor (Eds.), \u201c<span style=\"color: #000080\">Hardware IP Security and Trust: Design, Validation, and Test Perspective<\/span>\u201d, Springer, New York, USA, October 2016.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-3-319-49025-0\">Article<\/a>]<\/span><\/span><\/li>\n<li>Domenic Forte, <strong>Swarup Bhunia<\/strong>, and Mark M. Tehranipoor (Eds.), \u201c<span style=\"color: #000080\">Hardware Protection through Obfuscation<\/span>\u201d, Springer, New York, USA, November 2016.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-3-319-49019-9\">Article<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2014<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong>Swarup Bhunia<\/strong>, Steve Majerus, and Mohamad Sawan (Eds.), \u201c<span style=\"color: #000080\">Implantable Biomedical Microsystems: Design Principles and Applications<\/span>\u201d, Elsevier, MA, USA, January 2014.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/www.sciencedirect.com\/book\/edited-volume\/9780323262088\/implantable-biomedical-microsystems\">Article<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2013<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><u>Somnath Paul<\/u> and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Computing with Memory for Energy-Efficient Robust Systems<\/span>\u201d, Springer, New York, USA, August 2013.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/www.barnesandnoble.com\/w\/computing-with-memory-for-energy-efficient-robust-systems-somnath-paul\/1136503081\">Article<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2010<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong>Swarup Bhunia<\/strong> and Saibal Mukhopadhyay (Eds.), &#8220;<span style=\"color: #000080\">Low-Power Variation-Tolerant Design in Nanometer Silicon<\/span>&#8220;, Springer, New York, USA, 1<sup>st<\/sup> Edition, ISBN: 978-1-4419-7417-4, November 2010.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-1-4419-7418-1\">Article<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<\/div><div class=\"accordion-btn-wrap\"><\/div><\/div><\/div><\/div><\/div>\n\n\n\n<div class=\"wp-block-create-block-accordion-block-inner\"><div class=\"accordion-item\"><span class=\"accordion-header\" id=\"headingbdfc839a-be27-418c-a312-dc9e0d7c7f97\"><button class=\"accordion-button collapsed\" type=\"button\" data-bs-toggle=\"collapse\" data-bs-target=\"#collapsebdfc839a-be27-418c-a312-dc9e0d7c7f97\" aria-expanded=\"false\" aria-controls=\"bdfc839a-be27-418c-a312-dc9e0d7c7f97\">Book Chapters<\/button><\/span><div id=\"collapsebdfc839a-be27-418c-a312-dc9e0d7c7f97\" class=\"accordion-collapse collapse\" aria-labelledby=\"headingbdfc839a-be27-418c-a312-dc9e0d7c7f97\"><div class=\"accordion-body\"><div class=\"accordion-body-wrap\">\n<h4>2025<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><u>Moshiur Rahaman<\/u> and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Hardware Obfuscation and Logic Locking<\/span>\u201d. <a href=\"https:\/\/link.springer.com\/referencework\/10.1007\/978-3-030-71522-9\">Encyclopedia of Cryptography, Security and Privacy<\/a>, Springer Nature Switzerland, Pages: 1069-1072, 2025.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/rwe\/10.1007\/978-3-030-71522-9_1646\">Article<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2020<\/h4>\n<ul style=\"list-style-type: circle\">\n<li>Rajat Shubhra Chakraborty, Pranesh Pranesh Santikellur, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Register Transfer Level Hardware Obfuscation<\/span>\u201d. \u201c<a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-3-030-78841-4\">Behavioral Synthesis for Hardware Security<\/a>\u201d, edited by Srinivas Katkoori and Sheikh Ariful Islam, Springer, 2020.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-3-030-78841-4\">Article<\/a>]<\/span><\/span><\/li>\n<li><u>Abdulrahman M Alaql<\/u>, <u>Moshiur Rahman<\/u>, <u>Tamzidul Hoque<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Hardware IP Protection through Obfuscation<\/span>\u201d. \u201c<a href=\"https:\/\/digital-library.theiet.org\/doi\/book\/10.1049\/pbcs066e\">Frontiers in Hardware Security and Trust<\/a>\u201d, IET (Institution of Engineering and Technology), edited by Chang Chip Hong (Editor), 2020.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/digital-library.theiet.org\/doi\/book\/10.1049\/pbcs066e\">Article<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2018<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><u>Atul Prasad Debnath<\/u>, <u>Tamzidul Hoque<\/u>, and <strong>Swarup Bhunia<\/strong>, &#8220;<span style=\"color: #000080\">System-on-chip security architecture for internet of things<\/span>&#8220;. &#8220;<a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-3-030-02807-7\">Security and Fault tolerance in Internet of Things<\/a>&#8220;, Springer, 2018, Edited by Rajat Subhra ChakrabortyJimson MathewAthanasios V. Vasilakos.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-3-030-02807-7\">Article<\/a>]<\/span><\/span><\/li>\n<li><strong>Swarup Bhunia<\/strong>, and Mark Tehranipoor, \u201c<span style=\"color: #000080\">Emerging Trend, Industrial Practices, New Attacks<\/span>\u201d. \u201c<a href=\"https:\/\/dl.acm.org\/doi\/10.5555\/3202478\">The Hardware Trojan War: Attacks, Myths, and Defenses<\/a>\u201d, Springer, edited by Swarup Bhunia, and Mark Tehranipoor, 2018.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.5555\/3202478\">Article<\/a>]<\/span><\/span><\/li>\n<li><strong>Swarup Bhunia<\/strong>, and Mark Tehranipoor, \u201c<span style=\"color: #000080\">Hardware Trojan Preliminaries<\/span>\u201d. \u201c<a href=\"https:\/\/dl.acm.org\/doi\/10.5555\/3202478\">The Hardware Trojan War: Attacks, Myths, and Defenses<\/a>\u201d, Springer, edited by Swarup Bhunia, and Mark Tehranipoor, 2018.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.5555\/3202478\">Article<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2017<\/h4>\n<ul style=\"list-style-type: circle\">\n<li>Fahim Rahman<u>, Atul Prasad Deb Nath<\/u>, Domenic Forte, <strong>Swarup Bhunia<\/strong>, and Mark Tehranipoor, \u201c<span style=\"color: #000080\">Composition of Physical Unclonable Functions: From Device to Architecture<\/span>\u201d. \u201c<a href=\"https:\/\/www.taylorfrancis.com\/books\/edit\/10.1201\/9781315265056\/security-opportunities-nano-devices-emerging-technologies-mark-tehranipoor-domenic-forte-swarup-bhunia-garrett-rose\">Security Opportunities in Nano Devices and Emerging Technologies<\/a>\u201d, Springer, edited by Mark Tehranipoor, Domenic Forte, Garrett S. Rose and Swarup Bhunia, December 2017.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/www.taylorfrancis.com\/books\/edit\/10.1201\/9781315265056\/security-opportunities-nano-devices-emerging-technologies-mark-tehranipoor-domenic-forte-swarup-bhunia-garrett-rose\">Article<\/a>]<\/span><\/span><\/li>\n<li>Fahim Rahman, <u>Atul Prasad Deb Nath<\/u>, Domenic Forte, <strong>Swarup Bhunia<\/strong>, and Mark Tehranipoor, \u201c<span style=\"color: #000080\">Nano CMOS Logic-Based Security Primitive Design<\/span>\u201d. \u201c<a href=\"https:\/\/www.taylorfrancis.com\/books\/edit\/10.1201\/9781315265056\/security-opportunities-nano-devices-emerging-technologies-mark-tehranipoor-domenic-forte-swarup-bhunia-garrett-rose\">Security Opportunities in Nano Devices and Emerging Technologies<\/a>\u201d, Springer, edited by Mark Tehranipoor, Domenic Forte, Garrett S. Rose and Swarup Bhunia, December 2017.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/www.taylorfrancis.com\/books\/edit\/10.1201\/9781315265056\/security-opportunities-nano-devices-emerging-technologies-mark-tehranipoor-domenic-forte-swarup-bhunia-garrett-rose\">Article<\/a>]<\/span><\/span><\/li>\n<li><strong>Swarup Bhunia, <\/strong>Sandip Ray, and Susmita Sur-Kolay, \u201c<span style=\"color: #000080\">SoC Security: Summary and Future Directions<\/span>\u201d. \u201c<a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-3-319-50057-7\">Fundamentals of IP and SoC Security: Design, Verification and Debug<\/a>\u201d, Springer, edited by Swarup Bhunia, Sandip Ray, and Susmita Sur-Kolay, NY, USA, 2017.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-3-319-50057-7\">Article<\/a>]<\/span><\/span><\/li>\n<li><strong>Swarup Bhunia, <\/strong>Sandip Ray, and Susmita Sur-Kolay, \u201c<span style=\"color: #000080\">The Landscape of SoC and IP Security<\/span>\u201d. \u201c<a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-3-319-50057-7\">Fundamentals of IP and SoC Security: Design, Verification and Debug<\/a>\u201d, edited by Swarup Bhunia, Sandip Ray, and Susmita Sur-Kolay, Springer, NY, USA, 2017.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-3-319-50057-7\">Article<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2016<\/h4>\n<ul style=\"list-style-type: circle\">\n<li>Rajat Subhra Chakraborty and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">State Space Obfuscation for Hardware IP Protection<\/span>\u201d. \u201c<a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-3-319-49019-9\">Hardware Protection through Obfuscation<\/a>\u201d, edited by Domenic Forte, Swarup Bhunia, and Mark Tehranipoor, Springer, 2016.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-3-319-49019-9\">Article<\/a>]<\/span><\/span><\/li>\n<li>Prabhat Mishra, Mark Tehranipoor, and <strong>Swarup Bhunia<\/strong>, &#8220;<span style=\"color: #000080\">Security and Trust Vulnerabilities in Third-party IPs<\/span>&#8220;. \u201c<a href=\"https:\/\/www.springerprofessional.de\/en\/hardware-ip-security-and-trust\/11968028\">Hardware IP Security and Trust: Design, Validation, and Test Perspective<\/a>\u201d, edited by Prabhat Mishra, Swarup Bhunia, and Mark Tehranipoor, Springer, 2016.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/www.springerprofessional.de\/en\/hardware-ip-security-and-trust\/11968028\">Article<\/a>]<\/span><\/span><\/li>\n<li><u>Robert Karam<\/u> and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Compute-in-Memory Architecture for Data-Intensive Kernels<\/span>\u201d. \u201c<a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-3-319-54840-1\">Emerging Technology and Architecture for Big-data Analytics<\/a>\u201d, edited by Hao Yu, Chip Hong Chang, and Anupam Chattopadhyay, Springer, 2016.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-3-319-54840-1\">Article<\/a>]<\/span><\/span><\/li>\n<li><u>Sandip Ray,<\/u> <strong>Swarup Bhunia<\/strong>, and Prabhat Mishra, \u201c<span style=\"color: #000080\">Security Validation in System-on-Chip<\/span>\u201d. \u201c<a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-3-319-50057-7\">Fundamentals of IP and SoC Security: Design, Verification, and Debug<\/a>\u201d, edited by Swarup Bhunia, Sandip Ray, and Susmita Sur-Kolay, Springer, NY, USA, December 2016.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-3-319-50057-7\">Article<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2015<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><u>Rajat Subhra Chakraborty<\/u>, <u>Yu Zheng<\/u>, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Obfuscation-based SoC Design for Security against Piracy and Trojan Attacks<\/span>\u201d. \u201c<a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-3-319-14971-4\">Secure System Design and Trustable Computing<\/a>\u201d, edited by Chang Chip Hong and Miodrag Potkonjak, Springer International Publishing AG, Gewerbestrasse 11, 6330 Cham, Switzerland, 2015.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-3-319-14971-4\">Article<\/a>]<\/span><\/span><\/li>\n<li><u>Abhishek Basak<\/u> and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Implantable Imager for Online Monitoring of Internal Organs<\/span>\u201d. \u201c<a href=\"https:\/\/www.sciencedirect.com\/book\/edited-volume\/9780323262088\/implantable-biomedical-microsystems\">Bioimplantable Systems: Design Principles and Applications<\/a>\u201d, edited by Swarup Bhunia, Steve Majerus, and Mohamad Sawan, Elsevier, MA, USA, February 2015.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/www.sciencedirect.com\/book\/edited-volume\/9780323262088\/implantable-biomedical-microsystems\">Article<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2013<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><u>Abhishek Basak<\/u>, <u>Vaishnavi Ranganathan<\/u>, Seetharam Narasimhan, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Neural pattern recognition for closed-loop neuro-prosthesis<\/span>\u201d. \u201c<a href=\"https:\/\/www.wiley.com\/en-us\/Implantable+Bioelectronics-p-9783527673148\">Implantable Bioelectronics &#8211; Devices, Materials and Applications<\/a>\u201d, edited by Evgeny Katz, Wiley-VCH, August 2013.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/www.wiley.com\/en-us\/Implantable+Bioelectronics-p-9783527673148\">Article<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2012<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong>Swarup Bhunia<\/strong> and <u>Seetharam Narasimhan<\/u>, \u201c<span style=\"color: #000080\">Ultralow Power Implantable Electronics<\/span>\u201d. \u201c<a href=\"https:\/\/www.routledge.com\/Handbook-of-Energy-Aware-and-Green-Computing---Two-Volume-Set\/Ahmad-Ranka\/p\/book\/9781138198715\">Handbook of Energy-Aware and Green Computing<\/a>\u201d, edited by Sanjay Ranka and Ishfaq Ahmad,\u00a0Chapman &amp; Hall\/CRC Press, January 2012, ISBN: 978-1439850404.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/www.routledge.com\/Handbook-of-Energy-Aware-and-Green-Computing---Two-Volume-Set\/Ahmad-Ranka\/p\/book\/9781138198715\">Article<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2011<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong>Swarup Bhunia<\/strong> and <u>Seetharam Narasimhan<\/u>, \u201c<span style=\"color: #000080\">Hardware Trojan Detection<\/span>\u201d. \u201c<a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-1-4419-8080-9\">Introduction to Hardware Security and Trust<\/a>\u201d, edited by Mohammad Tehranipoor and Cliff Wang, Springer, New York, USA, September 2011, ISBN: 978-1441980793.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-1-4419-8080-9\">Article<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2009<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong>Swarup Bhunia<\/strong> and Kaushik Roy, &#8220;<span style=\"color: #000080\">Low Power Design Techniques and Test Implications<\/span>&#8220;. &#8220;<a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-1-4419-0928-2\">Power-Aware Testing and Test Strategies for Low Power Devices<\/a>&#8220;, edited by Patrick Girard, Nicola Nicolici, and Xiaoqing Wen, Springer, New York, USA, 1<sup>st<\/sup> Edition, ISBN: 978-1441909275, August 2009. [Best-seller in International Test Conference 2009].<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-1-4419-0928-2\">Article<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<\/div><div class=\"accordion-btn-wrap\"><\/div><\/div><\/div><\/div><\/div>\n\n\n\n<div class=\"wp-block-create-block-accordion-block-inner\"><div class=\"accordion-item\"><span class=\"accordion-header\" id=\"heading899aa55b-e347-4b3b-bcb4-f9f6449ca1b7\"><button class=\"accordion-button collapsed\" type=\"button\" data-bs-toggle=\"collapse\" data-bs-target=\"#collapse899aa55b-e347-4b3b-bcb4-f9f6449ca1b7\" aria-expanded=\"false\" aria-controls=\"899aa55b-e347-4b3b-bcb4-f9f6449ca1b7\">Editorials<\/button><\/span><div id=\"collapse899aa55b-e347-4b3b-bcb4-f9f6449ca1b7\" class=\"accordion-collapse collapse\" aria-labelledby=\"heading899aa55b-e347-4b3b-bcb4-f9f6449ca1b7\"><div class=\"accordion-body\"><div class=\"accordion-body-wrap\">\n<h4>2024<\/h4>\n<ul style=\"list-style-type: circle\">\n<li>Shivam Bhasin, Anupam Chattopadhyay, Tim G\u00fcneysu, <strong>Swarup Bhunia<\/strong>: &#8220;<span style=\"color: #000080\">Special Issue on Postquantum Cryptography for Internet of Things<\/span>&#8220;. <a href=\"https:\/\/ieee-cas.org\/publication\/ieee-design-test-magazine\">IEEE Des. Test<\/a> 41(5): 5-6 (2024).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/10654616\">Article<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2020<\/h4>\n<ul style=\"list-style-type: circle\">\n<li>Hai Helen Li, Wei Zhang, <strong>Swarup Bhunia<\/strong>, Wujie Wen, &#8220;<span style=\"color: #000080\">Introduction to the Special Issue on New Trends in Nanoelectronic Device, Circuit, and Architecture Design, Part 1<\/span>&#8220;. <a href=\"https:\/\/dl.acm.org\/journal\/jetc\">ACM J. Emerg. Technol. Comput. Syst.<\/a> 16(3): 24:1-24:3 (2020).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/3392080\">Article<\/a>]<\/span><\/span><\/li>\n<li>Wei Zhang, Hai Helen Li, Wujie Wen, <strong>Swarup Bhunia<\/strong>, &#8220;<span style=\"color: #000080\">Guest Editorial: ACM JETC Special Issue on New Trends in Nanolectronic Device, Circuit, and Architecture Design: Part 2<\/span>&#8220;. <a href=\"https:\/\/dl.acm.org\/journal\/jetc\">ACM J. Emerg. Technol. Comput. Syst.<\/a> 16(4): 35:1-35:3 (2020).<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/fullHtml\/10.1145\/3412343\">Article<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2019<\/h4>\n<ul style=\"list-style-type: circle\">\n<li>Prabhat Mishra, Debdeep Mukhopadhyay, and<strong> Swarup Bhunia, <\/strong>\u201c<span style=\"color: #000080\">Guest Editorial: Special Section on Autonomous Intelligence for Security and Privacy Analytics<\/span>\u201d. <a href=\"https:\/\/ieee-cas.org\/publication\/tvlsi\">IEEE Transacations on VLSI<\/a>(TVLSI), Dec 2019.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8910540\">Article<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2017<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong>Swarup Bhunia, <\/strong>An Chen, Ozgur Sinanoglu, and Jason M Fung, \u201c<span style=\"color: #000080\">Guest Editors\u2019 Introduction: Security of Beyond-CMOS Devices: Issues and Opportunities<\/span>\u201d. <a href=\"https:\/\/www.springerprofessional.de\/en\/journal-of-hardware-and-systems-security\/24017072\">Journal of Hardware and Systems<\/a> (TETC), August 2017.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8024043\">Article<\/a>]<\/span><\/span><\/li>\n<li><strong>Swarup Bhunia<\/strong> and Mark Tehranipoor, \u201c<span style=\"color: #000080\">Editorial for the Inaugural Issue of Journal of Hardware and Systems Security (HaSS)<\/span>\u201d. <a href=\"https:\/\/link.springer.com\/journal\/41635\">Journal of Hardware and Systems<\/a> (HaSS), June 2017.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/8024043\">Article<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2016<\/h4>\n<ul style=\"list-style-type: circle\">\n<li>Domenic Forte, Ron Perez, Yongdae Kim, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Guest Editors\u2019 Introduction: Supply Chain Security for Cyber-Infrastructure<\/span>\u201d. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=2\">IEEE Computer Magazine<\/a>, 2016.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7543441\">Article<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2015<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong>Swarup Bhunia<\/strong>, Jongsun Park, and Sandip Ray, \u201c<span style=\"color: #000080\">Guest Editors\u2019 Introduction: Wearables, Implants, and Internet of Things (First Issue)<\/span>\u201d. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=6687315\">IEEE Transactions on Multi-Scale Computing Systems<\/a> (TMSCS), December 2015.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7352388\">Article<\/a>]<\/span><\/span><\/li>\n<li>Ramesh Karri, Farinaz Koushanfar, Ozgur Sinanoglu, Yiorgos Makris, Ken Mai, Ahmad Reza Sadeghi, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Guest Editorial: Special Section on Hardware Security and Trust<\/span>\u201d. <a href=\"https:\/\/ieeexplore.ieee.org\/xpl\/RecentIssue.jsp?punumber=43\">IEEE Transactions on CAD of Integrated Circuits and Systems<\/a> (TCAD), June 2015.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/7110714\">Article<\/a>]<\/span><\/span><\/li>\n<li>Saibal Mukhopadhyay, Kaushik Roy, Hillery Hunter, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Guest Editorial: Computing in Emerging Technologies (Second Issue)<\/span>\u201d. <a href=\"https:\/\/ieee-cas.org\/publication\/JETCAS\">IEEE\u00a0Journal on Emerging and Selected Topics in Circuits and Systems<\/a> (JETCAS), March 2015.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?arnumber=7047905\">Article<\/a>]<\/span><\/span><\/li>\n<li><strong>Swarup Bhunia, <\/strong><u>Steve Majerus<\/u> and Mohamad Sawan, \u201c<span style=\"color: #000080\">Introduction<\/span>\u201d in Implantable Biomedical Microsystems: Design Principles and Applications, Elsevier Science and Technology, MA, USA, 1st Edition, ISBN: 0323262082, February 2015.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/www.sciencedirect.com\/book\/edited-volume\/9780323262088\/implantable-biomedical-microsystems\">Article<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2014<\/h4>\n<ul style=\"list-style-type: circle\">\n<li>Saibal Mukhopadhyay, Kaushik Roy, Hillery Hunter, and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Guest Editorial: Computing in Emerging Technologies (First Issue)<\/span>\u201d. <a href=\"https:\/\/ieee-cas.org\/publication\/JETCAS\">IEEE\u00a0Journal on Emerging and Selected Topics in Circuits and Systems<\/a> (JETCAS), December 2014.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?arnumber=6948289\">Article<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2013<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong>Swarup Bhunia<\/strong>, Leyla Nazhandali, and Dakshi Agrawal, \u201c<span style=\"color: #000080\">Guest Editors&#8217; Introduction: Trusted System with Untrusted Components: An Emerging Design Need<\/span>\u201d. <a href=\"https:\/\/ieee-cas.org\/publication\/ieee-design-test-magazine\">IEEE Design &amp; Test of Computers<\/a> (D&amp;T), April 2013.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?arnumber=6523962\">Article<\/a>]<\/span><\/span><\/li>\n<li>Somnath Paul and <strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">Preface<\/span>\u201d in Computing with Memory for Energy-Efficient Robust Systems, Springer, New York, USA, ISBN: 1461477972, September 2013.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-1-4614-7798-3\">Article<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2012<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong>Swarup Bhunia<\/strong> and Darrin J. Young, \u201c<span style=\"color: #000080\">Introduction to Special Issue on Implantable Electronics<\/span>\u201d. <a href=\"https:\/\/dl.acm.org\/toc\/jetc\/2026\/22\/2\">ACM Journal on Emerging Technologies in Computing Systems<\/a> (JETC), Vol. 8, No. 2, pp. 7.1-7.2, June 2012.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/dl.acm.org\/doi\/epdf\/10.1145\/2180878.2180879\">Article<\/a>]<\/span><\/span><\/li>\n<\/ul>\n<h4>2010<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong>Swarup Bhunia<\/strong> and Rahul Rao, \u201c<span style=\"color: #000080\">Guest Editors&#8217; Introduction: Managing Uncertainty through Postfabrication Calibration and Repair<\/span>\u201d. <a href=\"https:\/\/ieee-cas.org\/publication\/ieee-design-test-magazine\">IEEE Design &amp; Test of Computers<\/a> (D&amp;T), Vol. 27, No. 6, pp. 4-5, November 2010.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/ieeexplore.ieee.org\/document\/5648490\">Article<\/a>]<\/span><\/span><\/li>\n<li><strong>Swarup Bhunia<\/strong> and Saibal Mukhopadhyay, \u201c<span style=\"color: #000080\">Preface<\/span>\u201d in Low-Power Variation Tolerant Design in Nanometer Silicon, Springer, New York, USA, 1st Edition, ISBN: 1441974172, November 2010.<br \/><span style=\"color: #ff6600\"><span style=\"color: #000080\">[<a href=\"https:\/\/link.springer.com\/book\/10.1007\/978-1-4419-7418-1\">Article<\/a>]<\/span><\/span><\/li>\n<li><strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">A Special Issue on 23<sup>rd<\/sup> IEEE International Conference on VLSI Design, Bangalore, India, 3-7 January 2010<\/span>\u201d. <a href=\"http:\/\/www.aspbs.com\/jolpe.html\">Journal of Low Power Electronics<\/a> (JOLPE), Vol. 6, No. 3, pp. 375-375, October 2010.<\/li>\n<\/ul>\n<\/div><div class=\"accordion-btn-wrap\"><\/div><\/div><\/div><\/div><\/div>\n\n\n\n<div class=\"wp-block-create-block-accordion-block-inner\"><div class=\"accordion-item\"><span class=\"accordion-header\" id=\"headingfa8e6c84-f5e9-407d-8192-d209fede1604\"><button class=\"accordion-button collapsed\" type=\"button\" data-bs-toggle=\"collapse\" data-bs-target=\"#collapsefa8e6c84-f5e9-407d-8192-d209fede1604\" aria-expanded=\"false\" aria-controls=\"fa8e6c84-f5e9-407d-8192-d209fede1604\">Miscellaneous Other Articles<\/button><\/span><div id=\"collapsefa8e6c84-f5e9-407d-8192-d209fede1604\" class=\"accordion-collapse collapse\" aria-labelledby=\"headingfa8e6c84-f5e9-407d-8192-d209fede1604\"><div class=\"accordion-body\"><div class=\"accordion-body-wrap\">\n<h4>2018<\/h4>\n<ul style=\"list-style-type: circle\">\n<li>VLSI Circuits and Systems Letter (VCAL), official periodical of IEEE Computer Society Technical Committee on VLSI (TCVLSI), \u201c<span style=\"color: #000080\">Feature Member<\/span>\u201d of the Issue, November 2018.<\/li>\n<li>Foreward in the book \u201c<span style=\"color: #000080\">Hardware Security in DSP\/Multimedia<\/span>\u201d by Anirban Sengupta, June 2018.<\/li>\n<\/ul>\n<h4>2016<\/h4>\n<ul style=\"list-style-type: circle\">\n<li>Dagstuhl Seminar 16342 Report, \u201c<span style=\"color: #000080\">Foundations of Secure Scaling<\/span>\u201d, Edited by Lejla Batina, <strong>Swarup Bhunia<\/strong>, Patrick Schaumont, and Jean-Pierre Seifert, Dec 2016.<\/li>\n<\/ul>\n<h4>2014<\/h4>\n<ul style=\"list-style-type: circle\">\n<li><strong>Swarup Bhunia<\/strong>, \u201c<span style=\"color: #000080\">What is Hardware Security?<\/span>\u201d, Vol. 44, No. 12, ACM\/SIGDA E-Newsletter, December, 2014.<\/li>\n<\/ul>\n<\/div><div class=\"accordion-btn-wrap\"><\/div><\/div><\/div><\/div><\/div>\n<\/div><\/div><\/div><\/section><\/div>\n","protected":false},"excerpt":{"rendered":"","protected":false},"author":1409,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"page-templates\/page-blank-with-container.php","meta":{"_acf_changed":false,"inline_featured_image":false,"featured_post":"","footnotes":"","_links_to":"","_links_to_target":""},"class_list":["post-639","page","type-page","status-publish","hentry"],"acf":[],"_links":{"self":[{"href":"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-json\/wp\/v2\/pages\/639","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-json\/wp\/v2\/users\/1409"}],"replies":[{"embeddable":true,"href":"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-json\/wp\/v2\/comments?post=639"}],"version-history":[{"count":19,"href":"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-json\/wp\/v2\/pages\/639\/revisions"}],"predecessor-version":[{"id":5083,"href":"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-json\/wp\/v2\/pages\/639\/revisions\/5083"}],"wp:attachment":[{"href":"https:\/\/faculty.eng.ufl.edu\/swarup\/wp-json\/wp\/v2\/media?parent=639"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}