{"id":21,"date":"2019-06-12T16:33:21","date_gmt":"2019-06-12T16:33:21","guid":{"rendered":"http:\/\/smartsystems.ece.ufl.edu\/?page_id=21"},"modified":"2026-06-03T14:53:31","modified_gmt":"2026-06-03T19:53:31","slug":"research","status":"publish","type":"page","link":"https:\/\/faculty.eng.ufl.edu\/smartsystems\/research\/","title":{"rendered":"Research"},"content":{"rendered":"<p>\u00a0<\/p>\n<p><strong>The SmartSystems laboratory conducts interdisciplinary research at the intersection of hardware systems, artificial intelligence, cybersecurity, and autonomous cyber-physical systems. Our work spans the full computing stack, from smart sensors and System-on-Chip (SoC) architectures to FPGA-accelerated cloud infrastructures, autonomous robotic systems, and zero-trust security frameworks.<\/strong><\/p>\n<p>\u00a0<\/p>\n<h2>1. FPGA Design and Optimization for Edge, Cloud, and AI Systems<\/h2>\n<p>We develop novel FPGA architectures, compilation frameworks, and hardware-software co-design methodologies for high-performance and energy-efficient computing across edge and cloud environments. Our research addresses resource virtualization, multi-tenancy, accelerator sharing, secure bitstream deployment, and workload-aware hardware adaptation.<\/p>\n<p>Recent contributions include FPGA-accelerated cloud infrastructures supporting secure multi-tenant execution, trusted tenant-side bitstream synthesis, power-domain isolation through galvanic isolation mechanisms, and adaptive FPGA resource allocation. We further investigate AI acceleration through quantization-aware deployment, teacher-free knowledge distillation, chiplet-aware workload mapping, and reconfigurable architectures for next-generation edge intelligence.<\/p>\n<p>Representative projects include:<\/p>\n<ul>\n<li><strong>\u00b7<\/strong> FPGA multi-tenancy and reconfigurable cloud computing.<\/li>\n<li>\u00b7 Secure FPGA virtualization and trusted compilation.<\/li>\n<li>\u00b7 HARE: Hardware-software co-design for panoramic UAV vision.<\/li>\n<li>\u00b7 D-VAEKD: Knowledge distillation for highly quantized FPGA AI accelerators.<\/li>\n<li>\u00b7 Edge-SiP Synthesizer for chiplet-based AI systems.<\/li>\n<\/ul>\n<p>\u00a0<\/p>\n<h2>2. System-on-Chip Design Automation and Optimization<\/h2>\n<p>The laboratory develops methodologies, tools, and architectures for next-generation System-on-Chip (SoC) and heterogeneous computing platforms. Research focuses on design-space exploration, hardware-software co-design, security-aware synthesis, chiplet-based systems, and design automation techniques for complex embedded platforms.<\/p>\n<p>Our work combines optimization algorithms, formal methods, and architectural modeling to automatically generate SoC configurations that balance performance, power, area, security, and reliability requirements. Particular emphasis is placed on emerging heterogeneous and chiplet-based architectures for AI-enabled edge computing.<\/p>\n<p>Representative projects include:<\/p>\n<ul>\n<li>\u00b7 Security-aware SoC design automation.<\/li>\n<li>\u00b7 Multi-objective optimization of secure SoC architectures.<\/li>\n<li>\u00b7 OpenTitan-based trusted system design.<\/li>\n<li>\u00b7 Chiplet-aware workload mapping and heterogeneous integration.<\/li>\n<li>\u00b7 RTL verification and automated debugging methodologies.<\/li>\n<\/ul>\n<p>\u00a0<\/p>\n<h2>3. Zero-Trust Security for System-on-Chip and Cyber-Physical Systems<\/h2>\n<p>We investigate security architectures that extend beyond traditional perimeter-based protection toward Zero-Trust principles for embedded systems, cloud infrastructures, autonomous platforms, and cyber-physical systems.<\/p>\n<p>Building upon our Multi-Level Security (MLS) framework and the MEXT-SE design environment, we develop methodologies for secure-by-design hardware platforms capable of operating in adversarial environments. Current research focuses on Hardware Roots of Trust, resilient autonomous systems, secure FPGA clouds, trusted execution infrastructures, attack containment, and adaptive protection mechanisms.<\/p>\n<p>Our objective is to create computing systems that remain trustworthy even in the presence of compromised components, malicious tenants, or hostile operating conditions.<\/p>\n<p>Representative projects include:<\/p>\n<ul>\n<li>\u00b7 Zero-Trust architectures for autonomous systems.<\/li>\n<li>\u00b7 Security-aware SoC design automation.<\/li>\n<li>\u00b7 OpenTitan-enabled secure platforms.<\/li>\n<li>\u00b7 FPGA cloud security and trusted bitstream deployment.<\/li>\n<li>\u00b7 Resilient cyber-physical systems and autonomous fleets.<\/li>\n<li>\u00b7 Hardware Root of Trust and secure boot infrastructures.<\/li>\n<\/ul>\n<p>\u00a0<\/p>\n<h2>4. UAV, Robotics, and Autonomous Cyber-Physical Systems<\/h2>\n<p>The laboratory develops intelligent sensing, perception, and decision-making architectures for autonomous robots, unmanned aerial vehicles (UAVs), and multi-agent systems operating in complex environments.<\/p>\n<p>Our research combines distributed sensing, edge AI, computer vision, machine learning, and real-time embedded computing to enable robust human-robot collaboration and autonomous operation. Particular emphasis is placed on distributed perception, human intention prediction, collaborative robotics, panoramic UAV vision, and resilient autonomous platforms.<\/p>\n<p>Representative projects include:<\/p>\n<ul>\n<li>\u00b7 Distributed smart-camera networks for 360\u00b0 scene understanding.<\/li>\n<li>\u00b7 Human intention prediction for human-robot collaboration.<\/li>\n<li>\u00b7 Multi-robot coordination in manufacturing environments.<\/li>\n<li>\u00b7 UAV perception and panoramic vision systems.<\/li>\n<li>\u00b7 Real-time 3D scene reconstruction and tracking.<\/li>\n<li>\u00b7 Autonomous system resiliency and security.<\/li>\n<\/ul>\n<p>\u00a0<\/p>\n<h2>5. Smart Image Sensors and Neuromorphic Vision Systems<\/h2>\n<p>Inspired by biological vision systems, we develop smart image sensors that integrate sensing and computation within the imaging substrate. Our architectures perform hierarchical, pixel-parallel processing directly at the sensor level, dramatically reducing data movement, latency, and power consumption.<\/p>\n<p>The research combines reconfigurable computing, neuromorphic processing, deep learning acceleration, stacked silicon integration, advanced packaging, and in-sensor<\/p>\n<p>computing. By moving intelligence closer to the point of data acquisition, these systems enable real-time machine vision for resource-constrained edge platforms.<\/p>\n<p>Our architectures have demonstrated operation at 800 MHz while reducing dynamic power consumption by up to 96.9% through hierarchical processing and spatiotemporal redundancy elimination.<\/p>\n<p>Representative projects include:<\/p>\n<ul>\n<li>\u00b7 Hierarchical smart image sensor architectures.<\/li>\n<li>\u00b7 Neuromorphic pixel-level processing.<\/li>\n<li>\u00b7 Stacked-silicon and 3D-integrated vision systems.<\/li>\n<li>\u00b7 In-sensor deep learning acceleration.<\/li>\n<li>\u00b7 MAGMA: Adaptive Gaussian Mixture Model Accelerator.<\/li>\n<li>\u00b7 Vision systems for low-light and extreme-environment imaging.<\/li>\n<li>\u00b7 Smart sensing for robotics and autonomous systems.<\/li>\n<\/ul>\n<p>\u00a0<\/p>\n<h1>Cross-Cutting Research Theme<\/h1>\n<p>A unifying theme across all laboratory activities is the development of secure, intelligent, and adaptive computing systems, spanning the entire stack from smart sensors and edge devices to FPGA clouds, autonomous robots, and cyber-physical infrastructures. By integrating advances in reconfigurable computing, AI acceleration, system architecture, and zero-trust security, the laboratory aims to create next-generation platforms capable of operating efficiently, safely, and autonomously in increasingly complex environments.<\/p>\n<p>\u00a0<\/p>\n<h1>FUNDING<\/h1>\n<p>Our research is supported by funding and donations from the following organizations:<\/p>\n<ul>\n<li><strong>\u00b7 <\/strong>National Science Foundation<\/li>\n<li><strong>\u00b7 <\/strong>Airforce Research Lab<\/li>\n<li><strong>\u00b7 <\/strong>German Research Association<\/li>\n<li><strong>\u00b7 <\/strong>German-French University<\/li>\n<li><strong>\u00b7 <\/strong>European Union<\/li>\n<li><strong>\u00b7 <\/strong>Xilinx<\/li>\n<li><strong>\u00b7 <\/strong>Altera<\/li>\n<\/ul>\n<h1>COLLABORATION<\/h1>\n<p>We actively collaborate with the following organizations and companies:<\/p>\n<ul>\n<li><strong>\u00b7 <\/strong>R-Dex Systems (www.r-dex.com)<\/li>\n<li><strong>\u00b7 <\/strong>ZeSys (Center for Embedded Systems in Berlin, Germany) www.zesys.de<\/li>\n<li><strong>\u00b7 <\/strong>Frohle Network in Germany<\/li>\n<\/ul>\n<ul>\n<li><strong>\u00b7 <\/strong>Citi bank<\/li>\n<\/ul>\n\n\n<section class=\"fullwidth-text-block\"><div class=\"container px-0\"><div class=\"row align-items-start\"><div class=\"col-12\"><\/div><\/div><\/div><\/section>\n","protected":false},"excerpt":{"rendered":"<p>\u00a0 The SmartSystems laboratory conducts interdisciplinary research at the intersection of hardware systems, artificial intelligence, cybersecurity, and autonomous cyber-physical systems. Our work spans the full computing stack, from smart sensors and System-on-Chip (SoC) architectures to FPGA-accelerated cloud infrastructures, autonomous robotic systems, and zero-trust security frameworks. \u00a0 1. FPGA Design and Optimization for Edge, Cloud, and [&hellip;]<\/p>\n","protected":false},"author":1329,"featured_media":291,"parent":0,"menu_order":6,"comment_status":"closed","ping_status":"closed","template":"page-templates\/page-section-nav.php","meta":{"_acf_changed":false,"inline_featured_image":false,"featured_post":"","footnotes":"","_links_to":"","_links_to_target":""},"class_list":["post-21","page","type-page","status-publish","has-post-thumbnail","hentry"],"acf":[],"_links":{"self":[{"href":"https:\/\/faculty.eng.ufl.edu\/smartsystems\/wp-json\/wp\/v2\/pages\/21","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/faculty.eng.ufl.edu\/smartsystems\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/faculty.eng.ufl.edu\/smartsystems\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/faculty.eng.ufl.edu\/smartsystems\/wp-json\/wp\/v2\/users\/1329"}],"replies":[{"embeddable":true,"href":"https:\/\/faculty.eng.ufl.edu\/smartsystems\/wp-json\/wp\/v2\/comments?post=21"}],"version-history":[{"count":7,"href":"https:\/\/faculty.eng.ufl.edu\/smartsystems\/wp-json\/wp\/v2\/pages\/21\/revisions"}],"predecessor-version":[{"id":2711,"href":"https:\/\/faculty.eng.ufl.edu\/smartsystems\/wp-json\/wp\/v2\/pages\/21\/revisions\/2711"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/faculty.eng.ufl.edu\/smartsystems\/wp-json\/wp\/v2\/media\/291"}],"wp:attachment":[{"href":"https:\/\/faculty.eng.ufl.edu\/smartsystems\/wp-json\/wp\/v2\/media?parent=21"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}