{"id":49,"date":"2024-07-26T17:20:15","date_gmt":"2024-07-26T17:20:15","guid":{"rendered":"https:\/\/ewetz.ece.ufl.edu\/?page_id=49"},"modified":"2026-02-24T21:08:56","modified_gmt":"2026-02-25T02:08:56","slug":"publications","status":"publish","type":"page","link":"https:\/\/faculty.eng.ufl.edu\/ewetz\/publications\/","title":{"rendered":"Publications"},"content":{"rendered":"<h3>JOURNAL PUBLICATIONS<\/h3>\n<ol reversed=\"\">\n<li><strong>[TODAES&#8217;24]<\/strong> M. Rashed, S. Thijssen, S. Jha, and R. Ewetz, &#8220;<span data-olk-copy-source=\"MessageBody\">LOGIC: Logic Synthesis for Digital In-Memory Computing&#8221;, Transactions on Design Automation of Electronic Systems, 2024.<\/span><\/li>\n<li><b>[TAI&#8217;24]<\/b> I. Alkhouri, S. Jha, A. Beckus, G. Atia, S. Jha, R. Ewetz, and A. Velasquez, &#8220;Exploring The Predictive Capabilities of AlphaFold Using Adversarial Protein Sequences&#8221;, <em>in IEEE Transactions on Artificial Intelligence (TAI)<\/em>, 2024.<\/li>\n<li><b>[TCAD&#8217;23]<\/b> S. Thijssen, M. Rashed, S. Jha, and R. Ewetz, &#8220;PATH: Evaluation of Boolean Logic using Path-based In-Memory Computing Systems&#8221;, <em>in IEEE Trans. on Computer-aided Design of Integrated Circuits and Systems (TCAD).<\/em><\/li>\n<li><b>[MICRO&#8217;23]<\/b> M. Chowdhuryy, R. Ewetz , A. Awad , F. Yao, &#8220;Understanding and Characterizing Side Channels Exploiting Phase Change Memories&#8221;, <em>in IEEE MICRO (MICRO)<\/em>, (accepted).<\/li>\n<li><b>[TCAD&#8217;22]<\/b> M. Rashed, S. Thijssen, F. Yao, S. Jha, and R. Ewetz, &#8220;STREAM: Towards READ-based In-Memory Computing for Streaming Based Processing for Data-Intensive Applications&#8221;, <em>in IEEE Trans. on Computer-aided Design of Integrated Circuits and Systems (TCAD)<\/em>, 2022.<\/li>\n<li><b>[TCAD&#8217;22]<\/b> S. Thijssen, S. Jha, and R. Ewetz, &#8220;COMPACT: Flow-Based Computing on Nanoscale Crossbars with Minimal Semiperimeter and Maximum Dimension&#8221;, <em>in IEEE Trans. on Computer-aided Design of Integrated Circuits and Systems (TCAD)<\/em>, (accepted).<\/li>\n<li><b>[TODAES&#8217;22]<\/b> N. Uysal and R. Ewetz, &#8220;Synthesis of Clock Networks with a Mode Reconfigurable Topology&#8221;, <em>in ACM Trans. on Design Automation of Electronic Systems (ACM)<\/em>, 2022<\/li>\n<li><b>[TCAD&#8217;21]<\/b> N Uysal, B. Zhang, S. Jha, and R. Ewetz, &#8220;XMAP: Programming Memristor Crossbars for Analog Matrix-Vector Multiplication: Towards High Precision using Representable Matrices&#8221;, <em>in IEEE Trans. on Computer-aided Design of Integrated Circuits and Systems (TCAD)<\/em>, 2021.<\/li>\n<li><b>[PRAI&#8217;21]<\/b> A. Michel and R. Ewetz, &#8220;A Survey on the Vulnerability of Deep Neural Networks Against Adversarial Attacks, Progress in Artificial Intelligence (PRAI), 2021.<\/li>\n<li><b>[TCAD&#8217;20]<\/b> B. Zhang, N Uysal, and R. Ewetz, &#8220;Computational Restructuring: Rethinking Image Compression using Resistive Crossbar Arrays&#8221;, <em>in IEEE Trans. on Computer-aided Design of Integrated Circuits and Systems (TCAD)<\/em>, (accepted).<a href=\"https:\/\/ieeexplore.ieee.org\/document\/9144535\"> [pdf]<\/a><\/li>\n<li><b>[CAL&#8217;19]<\/b> Vamsee Reddy Kommareddy, Baogang Zhang, Fan Yao, R. Ewetz, and Amro Awad, &#8220;Are Crossbar Memories Secure? New Security Vulnerabilities in Crossbar Memories&#8221;, <em>in IEEE Computer Architecture Letters (CAL)<\/em>, (accepted).<\/li>\n<li><b>[TCAD&#8217;19]<\/b> B. Zhang, N Uysal, D. Fan, and R. Ewetz, &#8220;Handling Stuck-at-fault Defects using Matrix Transformation for Robust Inference of DNNs&#8221;, <em>in IEEE Trans. on Computer-aided Design of Integrated Circuits and Systems (TCAD)<\/em>, (accepted). <a href=\"https:\/\/ieeexplore.ieee.org\/document\/8852740\">[pdf]<\/a><\/li>\n<li><b>[TCAD&#8217;18]<\/b> R. Ewetz and C-K. Koh, &#8220;Scalable Construction of Clock Trees with Useful Skew and High Timing Quality&#8221;, <em>in IEEE Trans. on Computer-aided Design of Integrated Circuits and Systems (TCAD)<\/em>, (early access), May 2018. <a href=\"https:\/\/ieeexplore.ieee.org\/document\/8355996\/\">[pdf]<\/a><\/li>\n<li><b>[INTE&#8217;17]<\/b> R. Ewetz and C-K. Koh, &#8220;Fast Clock Scheduling and an Application to Clock Tree Synthesis&#8221;, <em>in Integration, the VLSI Journal<\/em>, 56:115-127, January 2017. <a href=\"http:\/\/www.sciencedirect.com\/science\/article\/pii\/S0167926016300906\">[pdf]<\/a><\/li>\n<li><b>[TODAES&#8217;16]<\/b> R. Ewetz and C-K. Koh, &#8220;Construction of Reconfigurable Clock Trees for MCMM Designs using Mode Separation and Scenario Compression&#8221;, <em>in ACM Trans. on Design Automation of Electronic Systems (ACM)<\/em>, 21(4):57-83, June 2016. <a href=\"http:\/\/dl.acm.org\/citation.cfm?id=2883609\">[pdf]<\/a><\/li>\n<li><b>[TCAD&#8217;15]<\/b> R. Ewetz and C-K. Koh., \u201cCost-Effective Robustness in Clock Networks Using Near-Tree Structures\u201d, <em>in IEEE Trans. on Computer-aided Design of Integrated Circuits and Systems (TCAD)<\/em>, 34(4):515-528, January 2015. <a href=\"http:\/\/ieeexplore.ieee.org\/document\/7008465\/?arnumber=7008465&amp;tag=1\">[pdf]<\/a><\/li>\n<\/ol>\n<h3>CONFERENCE PUBLICATIONS<\/h3>\n<ol reversed=\"\">\n<li><strong>[DAC&#8217;26]<\/strong> Venkata Nithin Kamineni, Habibur Rahaman, Ovishake Sen, Baibhab Chatterjee, Swarup Bhunia, and Rickard Ewetz, &#8220;E\u00b3-CODE: Embedded and Efficient Error-Correcting Code for Error-Resilient Neural Networks&#8221;, in Design Automation Conference (DAC), 2026.<\/li>\n<li><strong>[NeurIPS&#8217;25]<\/strong> Amir Ghazizadeh Ahsaei, Rickard Ewetz, and Hao Zheng, \u201dGAMMA: Gated Multi-hop Message Passing<br \/>\nfor Homophily-Agnostic Node Representation in GNNs\u201d, Conference on Neural Information Processing<br \/>\nSystems (NeurIPS), 2025.<\/li>\n<li><strong>[ICMLA&#8217;25]<\/strong> Fazle Rahat, M Shifat Hossain, Arvind Ramanathan, Sumit Kumar Jha, Hao Zheng, and Rickard Ewetz,<br \/>\n\u201dAttr-RAG: Attribution-Guided Retrieval-Augmented Generation for Scientific Experiment Design\u201d, Inter-<br \/>\nnational Conference on Machine Learning and Applications (ICMLA), 2025<\/li>\n<li><strong>[ICMLA&#8217;25]<\/strong> Md Rubel Ahmed, Fazle Rahat, M Shifat Hossain, Sumit Kumar Jha, and Rickard Ewetz, \u201dStreet2Air: A<br \/>\nFramework for Synthesizing Aerial Vehicle Views from Ground Images\u201d, International Conference on Ma-<br \/>\nchine Learning and Applications (ICMLA), 2025<\/li>\n<li><strong>[ICMLA&#8217;25]<\/strong> M Shifat Hossain, Sumit Kumar Jha, Hao Zheng and Rickard Ewetz, \u201dMultitask Contrastive Learning using<br \/>\nTask-Wise Training and Partitioned Embedding Space\u201d, International Conference on Machine Learning and<br \/>\nApplications (ICMLA), 2025.<\/li>\n<li><strong>[MLCAD&#8217;25]<\/strong> Md Rubel Ahmed, Sadiba Nusrat Nur, Rickard Ewetz, \u201dContext-Enhanced Architectural Specification<br \/>\nGeneration for SoC Designs\u201d, International Symposium on Machine Learning for CAD (MLCAD), 2025.<\/li>\n<li><strong>[ICML&#8217;25]<\/strong> William English, Dominic Simon, Sumit Jha, and Rickard Ewetz, \u201dGrammar-Forced Translation of Natural<br \/>\nLanguage to Temporal Logic using LLMs, International Conference on Machine Learning (ICML), 2025.<\/li>\n<li><strong>[IJCAI&#8217;25]<\/strong> Dominic Simon and Rickard Ewetz, \u201dKnowledge Editing for Multi-Hop Question Answering Using Se-<br \/>\nmantic Analysis, International Joint Conference on Artificial Intelligence (IJCAI), 2025.<\/li>\n<li><strong>[IJCNN&#8217;25] <\/strong>D. Simon, S. Jha, R Ewetz, <span data-olk-copy-source=\"MessageBody\">Detecting and Removing Adversarial Patches using Frequency Signatures<\/span>, &#8220;International Joint Conference on Neural Networks\u00a0 (IJCNN)&#8221;, 2025.<\/li>\n<li><strong>[MDTS&#8217;25] <\/strong>J. Modasiya, v. Kamineni, M. Rashed, M. Liehr, S. Jha, R. Ewetz, N. Cady, On the Design and Fabrication of PATH-based In-Memory Computing Multipliers, &#8220;Microelectronics Design and Test Symposium (MDTS)&#8221;, 2025.<strong><br \/>\n<\/strong><\/li>\n<li><strong>[ICLR&#8217;25]<\/strong> C. Walker, S. Jha, and R. Ewetz, Metric-Driven Attributions for Vision Transformers, <em>International Conference on Learning Representations (ICLR)<\/em>, 2025.<\/li>\n<li><strong>[AISTATS&#8217;25]<\/strong> C. Walker, R. Ahmed, S. Jha, and R. Ewetz, Explaining ViTs Using Information Flow, <em>International Conference on Artificial Intelligence and Statistics (AISTATS)<\/em>, 2025.<\/li>\n<li><b>[WACV&#8217;25]<\/b> F. Rahat, S. Hossain, R. Ahmed, S. Jha, and R. Ewetz, &#8220;Data Augmentation for Image Classification using Generative AI\u201d, <em>Winter Conference on Applications of Computer Vision (WACV)<\/em>, 2025.<\/li>\n<li><b>[ICCAD&#8217;24]<\/b> S. Thijssen, M. Rashed, M. Ahemed, S. Singireddy, S. Jha and R. Ewetz, &#8220;Equivalence Checking for Flow-Based Computing using Iterative SAT Solving\u201d, <em>International Conference on Computer-Aided Design (ICCAD)<\/em>, 2024.<\/li>\n<li><b>[IJCAI&#8217;24]<\/b> C. Walker, D. Simon, K. Chen, R. Ewetz, &#8220;Attribution Quality Metrics with Magnitude Alignment\u201d, <em>International Joint Conference on Artificial Intelligence (IJCAI)<\/em>, 2024.<\/li>\n<li><b>[DAC&#8217;24]<\/b> S. Thijssen, M. Rashed, S. Jha and R. Ewetz, &#8220;Synthesis of Compact Flow-based Computing Circuits from Boolean Expressions\u201d, <em>Design Automation Conference (DAC)<\/em>, 2024.<\/li>\n<li><b>[DAC&#8217;24]<\/b> M. Rashed, S. Thijssen, D. Simon, S. Jha and R. Ewetz , &#8220;Execution Sequence Optimization for Processing In-Memory using Parallel Data Preparation\u201d, <em>Design Automation Conference (DAC)<\/em>, 2024.<\/li>\n<li><b>[DAC&#8217;24]<\/b> S. Jha, S. Jha, R. Ewetz and A. Velasquez, &#8220;On the Design of Novel Attention Mechanism for Enhanced Efficiency of Transformers\u201d, <em>Design Automation Conference (DAC)<\/em>, 2024.<\/li>\n<li><b>[AAAI&#8217;24]<\/b> C. Walker, S. Jha, K. Chen, R. Ewetz, &#8220;Integrated Decision Gradients: Compute Your Attributions Where the Model Makes Its Decision\u201d, <em>Thirty-Eighth AAAI Conference on Artificial Intelligence (AAAI)<\/em>, 2024.<\/li>\n<li><strong>[MILCOM&#8217;24]<\/strong> L. Pullum, S. Jha, and R. Ewetz, &#8220;Intelligence, Surveillance and Reconnaissance Task Specifications in Temporal Logics\u201d, <em>Military Communications Conference (MILCOM)<\/em>, 2024.<\/li>\n<li><span class=\"NormalTextRun SCXW186319769 BCX0\"><strong>[MILCOM-W&#8217;24]<\/strong> S. Jha, S. Jha,<\/span> <span class=\"NormalTextRun SCXW186319769 BCX0\">R. Ewetz, and A. Velasquez, <span class=\"TextRun SCXW68176693 BCX0\" lang=\"EN-US\" xml:lang=\"EN-US\" data-contrast=\"auto\"><span class=\"NormalTextRun SCXW68176693 BCX0\">Co-Synthesis of Code and Formal Models Using Large Language Models and Functors,&#8221;\u00a0<\/span><\/span><\/span><em style=\"background-color: var(--bs-body-bg);font-weight: var(--bs-body-font-weight);text-align: var(--bs-body-text-align)\"><span class=\"TextRun SCXW549124 BCX0\" lang=\"EN-US\" xml:lang=\"EN-US\" data-contrast=\"auto\"><span class=\"NormalTextRun SCXW549124 BCX0\">Workshop on the applications of artificial intelligence in code analysis<\/span><\/span><span class=\"EOP SCXW549124 BCX0\" data-ccp-props=\"{&quot;134233117&quot;:false,&quot;134233118&quot;:false,&quot;201341983&quot;:0,&quot;335551550&quot;:1,&quot;335551620&quot;:1,&quot;335559685&quot;:0,&quot;335559737&quot;:0,&quot;335559738&quot;:0,&quot;335559739&quot;:0,&quot;335559740&quot;:259}\"> at <\/span>Military Communications Conference (MILCOM)<\/em><span style=\"background-color: var(--bs-body-bg);font-weight: var(--bs-body-font-weight);text-align: var(--bs-body-text-align)\">, 2024.<\/span><\/li>\n<li><strong>[ICMLA&#8217;24] <\/strong>S. Hossain, C. Walker, S. Jha, and R. Ewetz, &#8220;Out-of-Distribution Detection for Contrastive Models using Angular Distance Measures\u201d, <em>International Conference on Machine Learning and Applications (ICMLA)<\/em>, 2024.<\/li>\n<li><strong>[ICMLA&#8217;24] <\/strong>William English, Dominic Simon, Sumit Jha, and Rickard Ewetz, &#8220;NSP: A Neuro-Symbolic Natural Language Navigational Planner\u201d, <em>International Conference on Machine Learning and Applications (ICMLA), <\/em>2024.<\/li>\n<li><strong>[ICMLA&#8217;24]<\/strong> F. Rahat, S. Hossain, R. Ahmed, and R. Ewetz, &#8220;CLE: Context-Aware Local Explanations for High Dimensional Tabular Data\u201d, <em>International Conference on Machine Learning and Applications (ICMLA)<\/em>, 2024.<\/li>\n<li><strong>[ICCA&#8217;24]<\/strong> <span class=\"s3\">W. English, D. Simon, M. R. Ahmed, S. K. Jha, and R. <span class=\"SpellE\">Ewetz<\/span><\/span>, &#8220;<span class=\"s3\">Neuro-Symbolic Program Synthesis for Multi-Hop Natural Language Navigation<\/span>\u201d, <em>International Conference on Assured Autonomy (ICCA)<\/em>, 2024.<\/li>\n<li><strong>[ICCA&#8217;24]<\/strong> S. Jha, S.Jha, R. Ewetz, and Alvaro Velasquez, &#8220;<span class=\"s3\">Solving Mystery Planning Problems Using Category Theory, Functors, and Large Language Models<\/span>\u201d, <em>International Conference on Assured Autonomy (ICCA)<\/em>, 2024.<\/li>\n<li><span class=\"s3\"><strong>[NAECON&#8217;24]<\/strong> S. K. Jha, S. Jha, M. Rashed, R. <span class=\"SpellE\">Ewetz<\/span>, and A. Velasquez, Automated Synthesis of Hardware Designs using Symbolic Feedback and Large Language Models. <em>National Aerospace and Electronics Conference (NAECON)<\/em>, 2024.<\/span><\/li>\n<li><b>[NucLeaR&#8217;24]<\/b> S. Hossain, R. Ahmed, L. Pullum, S. Jha, and R. Ewetz, &#8220;Neuro-Symbolic Representations of 3D Scenes using Universal Scene Description Language\u201d, <em>Workshop on Neuro-Symbolic Learning and Reasoning in the Era of Large Language Models at the Thirty-Eighth AAAI Conference on Artificial Intelligence (AAAI)<\/em>, 2024.<\/li>\n<li><b>[ASP-DAC&#8217;24]<\/b> S. Thijssen, M. Rashed, S. Jha, and R. Ewetz, &#8220;READ-based In-Memory Computing using Sentential Decision Diagrams\u201d, <em>Asia and South Pacific Design Automation Conference (ASP-DAC)<\/em>, 2024.<\/li>\n<li><b>[ASP-DAC&#8217;24]<\/b> S. Thijssen, M. Rashed, H. Zheng, S. Jha, and R. Ewetz, &#8220;Towards Area-Efficient Path-Based In-Memory Computing using Graph Isomorphisms\u201d, <em>Asia and South Pacific Design Automation Conference (ASP-DAC)<\/em>, 2024.<\/li>\n<li><b>[ICCD&#8217;23]<\/b> S. Singireddy, M. Rashed, S. Thijssen, R. Ewetz and S. Jha, &#8220;Input-Aware Flow-Based In-Memory Computing\u201d, <em>International Conference on Computer Design (ICCD)<\/em>, 2023.<\/li>\n<li><b>[ICCAD&#8217;23]<\/b> M. Rashed, S. Thijssen, H. Zheng, SK Jha, and R. Ewetz, &#8220;Path-based Processing using In-Memory Systolic Arrays for Accelerating Data-Intensive Applications\u201d, <em>International Conference on Computer-Aided Design (ICCAD)<\/em>, 2023.<\/li>\n<li><b>[ICCAD&#8217;23]<\/b> S. Thijssen, M. Rashed, S. Singireddy, SK Jha, and R. Ewetz, &#8220;Verification of Flow-Based Computing Systems using Bounded Model Checking\u201d, <em>International Conference on Computer-Aided Design (ICCAD)<\/em>, 2023.<\/li>\n<li><b>[ICCAD&#8217;23]<\/b> M. Rashed, S. Thijssen, SK Jha, and R. Ewetz, &#8220;Automated Synthesis for In-Memory Computing\u201d, <em>International Conference on Computer-Aided Design (ICCAD)<\/em>, 2023.<\/li>\n<li><b>[MILCOM&#8217;23]<\/b> C. Walker, D. Simon, S. Jha, and R. Ewetz, &#8220;Adversarial Pixel and Patch Detection Using Attribution Analysis\u201d, <em>Military Communications Conference (MILCOM)<\/em>, 2023.<\/li>\n<li><b>[MILCOM&#8217;23]<\/b> S. Jha, S. Jha, P. Lincoln, N. Bastian, A. Velasquez, R. Ewetz, and S. Neema, &#8220;Counterexample Guided Inductive Synthesis Using Large Language Models and Satisfiability Solving\u201d, <em>Military Communications Conference (MILCOM)<\/em>, 2023. (<span style=\"color: red\"><strong>Best Paper Candidate<\/strong><\/span>)<\/li>\n<li><b>[MILCOM&#8217;23]<\/b> S. Jha, S. Jha, R. Ewetz, A. Velasquez, &#8220;Neural SDEs for Robust and Explainable Analysis of Electromagnetic Unintended Radiated Emissions\u201d, <em>Military Communications Conference (MILCOM)<\/em>, 2023.<\/li>\n<li><b>[PerCPS&#8217;23]<\/b> S. Singireddy, R. Ewetz, SK Jha,&#8221;Adversarial Robustness against Perceptual Attacks&#8221;, <em>The International Workshop on Perception for Safety-Critical Cyber-Physical Systems (PerCPS),<\/em> 2023.<\/li>\n<li><b>[DAC&#8217;23]<\/b> S. Thijssen, M. Rashed, SK Jha, and R. Ewetz, &#8220;UpTime: Towards Flow-based In-Memory Computing with High Fault-Tolerance\u201d, <em>Design Automation Conference (DAC)<\/em>, 2023.<\/li>\n<li><b>[ASP-DAC&#8217;23]<\/b> M. Rashed, SK Jha, and R. Ewetz, &#8220;Discovering the In-Memory Kernels of 3D Dot-Product Engines\u201d, <em>Asia and South Pacific Design Automation Conference (ASP-DAC)<\/em>, 2023.<\/li>\n<li><b>[ASP-DAC&#8217;23]<\/b> S. Thijssen, SK Jha, and R. Ewetz, &#8220;FLOW-3D: Flow-Based Computing on 3D Nanoscale Crossbars with Minimal Semiperimeter\u201d, <em>Asia and South Pacific Design Automation Conference (ASP-DAC) <\/em>, 2023.<\/li>\n<li><b>[TSRML&#8217;22]<\/b> SK Jha, R. Ewetz, A. Velasquez, S. Jha, &#8220;Socially Responsible Reasoning with Large Language Models and The Impact of Proper Nouns\u201d, <em>Workshop on Trustworthy and Socially Responsible Machine Learning at Conference on Neural Information Processing (TSRML at NeurIPS)<\/em>, 2022.<\/li>\n<li><b>[ICCD&#8217;22]<\/b> S. Thijssen, SK Jha, and R. Ewetz, &#8220;Equivalence Checking for Flow-based In-Memory Computing\u201d, <em>International Conference on Computer Design (ICCD)<\/em>, 2022.<\/li>\n<li><b>[ICCAD&#8217;22]<\/b> M. Rashed, SK Jha, and R. Ewetz, &#8220;Logic Synthesis for Digital In-Memory Computing\u201d, <em>International Conference on Computer-Aided Design (ICCAD)<\/em>, 2022. (<span style=\"color: red\"><strong>Best Paper Candidate<\/strong><\/span>)<a href=\"https:\/\/sumitkumarjha.com\/papers\/2022_Jha_ICCAD_LogicSynthesisInMemoryComputingHybrid.pdf\"> [pdf]<\/a><\/li>\n<li><b>[AICAS&#8217;22]<\/b> S. Singireddy, R. Ewetz, SK Jha,&#8221;Deep Learning Toolkit-Driven Equivalence Checking of Flow-Based Computing Systems\u201d, <em>International Conference on Artificial Intelligence Circuits and Systems (AICAS)<\/em>, 2022.<\/li>\n<li><b>[IJCAI-ECAI&#8217;22]<\/b> SK. Jha, R. Ewetz , A. Velasquez, L. Pullum and S. Jha, &#8220;ExplainIt! A Tool for Computing Robust Attributions of Deep Neural Networks\u201d, <em>International Joint Conference on Artificial Intelligence (IJCAI)<\/em>, Demo Track, 2022.<\/li>\n<li><b>[DAC&#8217;22]<\/b> S. Thijssen, SK Jha, and R. Ewetz, &#8220;PATH: Evaluation of Boolean Logic using Path-based In-Memory Computing\u201d, <em>Design Automation Conference (DAC)<\/em>, 2022. (<span style=\"color: red\"><strong>Publicity Paper<\/strong><\/span>)<\/li>\n<li><b>[DAC&#8217;22]<\/b> M. Rashed, Amro Awad, SK Jha, and R. Ewetz, &#8220;Towards Resilient Analog In-Memory Deep Learning via Data Layout Re-Organization\u201d, <em>Design Automation Conference (DAC)<\/em>, 2022. (<span style=\"color: red\"><strong>Publicity Paper<\/strong><\/span>)<\/li>\n<li><b>[AAAI&#8217;22]<\/b> S. Jha, R. Ewetz, A. Velasques, A. Ramanathan and S. Jha, &#8220;Shaping Noise for Robust Attributions in Neural Stochastic Differential Equations\u201d, <em>International Conference on Artificial Intelligence (AAAI)<\/em>, 2022.<\/li>\n<li><b>[DATE&#8217;22]<\/b> M. Rashed, F. Yao. SK Jha, and R. Ewetz, &#8220;Hybrid Digial-Digital In-Memory Computing\u201d, <em>Design Automation and Test in Europe Conference (DATE)<\/em>, 2022.<\/li>\n<li><b>[ASP-DAC&#8217;22]<\/b> M. Rashed, S. Thijssen, F. Yao. SK Jha, and R. Ewetz, &#8220;STREAM: Towards READ-based In-Memory Computing for Streaming based Data Processing\u201d, <em>Asia and South Pacific Design Automation Conference (ASP-DAC)<\/em>, 2022.<\/li>\n<li><b>[SECON&#8217;22]<\/b> A. Michel and R. Ewetz, &#8220;Gradient-Based Adversarial Attack Detection via Deep Feature Extraction\u201d, <em>SoutheastCon (SECON)<\/em>, 2022.<\/li>\n<li><b>[ICMLA&#8217;22]<\/b> Kamalakkannan Ravi, Rickard Ewetz, and Adan Vela, &#8220;Classifying the Ideological Orientation of User-Submitted Texts in Social Media\u201d, <em>\u201d, International Conference on Machine Learning and Applications (ICMLA)<\/em>, 2022.<\/li>\n<li><b>[QIP&#8217;22]<\/b> S. Ahmed, R. Ewetz, and G. Sukthankar, &#8220;Minimizing Elementary Gates in IBM Quantum Architectures using Deferred Swap Embedding\u201d, Poster track, <em>Conference on Quantum Information Processing (QIP)<\/em>, 2022.<\/li>\n<li><b>[MICRO&#8217;21]<\/b> M. Chowdhuryy, M. Rashed, A. Awad, R. Ewetz, and F. Yao, &#8220;LADDER: Architecting Content and Location-aware Writes for Crossbar Resistive Memories\u201d, <em>International Symposium on Microarchitecture (MICRO)<\/em>, 2021.<\/li>\n<li><b>[ICCAD&#8217;21]<\/b> M. Rashed, SK Jha, and R. Ewetz, &#8220;Hybrid Anlog-Digital In-Memory Computing\u201d, <em>International Conference On Computer Aided Design (ICCAD)<\/em>, 2021.<\/li>\n<li><b>[ICCAD&#8217;21]<\/b> N. Uysal and R. Ewetz, &#8220;An OCV-Aware Clock Tree Synthesis Methodology\u201d, <em>International Conference On Computer Aided Design (ICCAD)<\/em>, 2021.<\/li>\n<li><b>[SEED&#8217;21]<\/b> M. Chowdhuryy, Rickard Ewetz, Amro Awad and Fan Yao, &#8220;R-SAW: New Side Channels Exploiting Read Asymmetry in MLC Phase Change Memories\u201d, <em>International Symposium on Secure and Private Execution Environment Design (2021) <\/em>, 2021.<\/li>\n<li><b>[GLSVLSI&#8217;21]<\/b> S. Channamadhavuni, S. Thijssen, S. Jha, and R. Ewetz, &#8220;Accelerating AI Applications using Analog In-Memory Computing: Challenges and Opportunities\u201d, <em>Great Lakes Symposium on VLSI (GLSVLSI)<\/em>, 2021. (invited)<\/li>\n<li><b>[IJCAI&#8217;21]<\/b> S. Jha, R. Ewetz, A. Velasques, and S. Jha, &#8220;On Smoother Attributions using Neural Stochastic Differential Equations\u201d, <em>International Joint Conference on Artificial Intelligence (IJCAI)<\/em>, 2021.<\/li>\n<li><b>[DAC&#8217;21]<\/b> B. Zhang and R. Ewetz, &#8220;Towards Resilient Deployment of High Throughput In-Memory Neural Networks\u201d, <em>Design Automation Conference (DAC)<\/em>, 2021.<\/li>\n<li><b>[ISCAS&#8217;21]<\/b> A. Velasquez, S.K. Jha, R. Ewetz and S. Jha, &#8220;Automated Synthesis of Quantum Circuits Using Symbolic Abstractions and Decision Procedures\u201d, <em>International Symposium on Circuits &amp; Systems (ISCAS)<\/em>, 2021.<\/li>\n<li><b>[DATE&#8217;21]<\/b> S. Thijssen, SK. Jha, and R. Ewetz, &#8220;COMPACT: Flow-Based Computing on Nanoscale Crossbars with Minimal Semiperimeter\u201d, <em>Design Automation and Test in Europe Conference (DATE)<\/em>, Feburary 2021. (<span style=\"color: red\"><strong>Best Paper Candidate<\/strong><\/span>)<\/li>\n<li><b>[ICCAD&#8217;20]<\/b> N. Uysal, B. Zhang, SK Jha, and R. Ewetz, &#8220;DP-MAP: Towards Resistive Dot-Product Engines with Improved Precision\u201d, <em>International Conference On Computer Aided Design (ICCAD)<\/em>, San Diego, 2020.<\/li>\n<li><b>[ISVLSI&#8217;20]<\/b> B. Zhang, M. Murshed, F. Hussain, and R. Ewetz, &#8220;Fast Resilient-Aware Data Layout Organization for Resistive Computing Systems\u201d, <em>IEEE Computer Society Annual Symposium on VLSI (ISVLSI)<\/em>, Limassol, Cyprus, 2020.<\/li>\n<li><b>[GLSVLSI&#8217;20]<\/b> B. Zhang, N. Uysal, D. Fan, and R. Ewetz, &#8220;Redundant Neurons and Shared Redundant Synapses for Robust Memristor-based DNNs with Reduced Overhead\u201d, <em>Great Lakes Symposium on VLSI (GLSVLSI)<\/em>, Beijing, China, 2020.<\/li>\n<li><b>[CVPRW&#8217;20]<\/b> Steven Fernandes, Sunny Raj, Rickard Ewetz, Jodh Singh Pannu, Sumit Kumar Jha, Eddy Ortiz, Iustina Vintila, Margaret Salter, &#8220;Detecting Deepfake Videos Using Attribution-Based Confidence Metric\u201d, <em>Conference on Computer Vision and Pattern Recognition Workshops<\/em>, May, 2020.<\/li>\n<li><b>[ISPD&#8217;20]<\/b> N. Uysal, J. Cabrera, and R. Ewetz, &#8220;Synthesis of Clock Networks with a Mode Reconfigurable Topology and No Short Circuit Current\u201d, <em>International Symposium on Physical Design (ISPD)<\/em>, March 29- April 1, 2020, Taipei, Taiwan.<\/li>\n<li><b>[DATE&#8217;20]<\/b> B. Zhang, N. Uysal, and R. Ewetz, &#8220;Computational Restructuring: Rethinking Image Processing using Memristor Crossbar Arrays\u201d, <em>Design Automation and Test in Europe Conference (DATE)<\/em>, March 2020.<\/li>\n<li><b>[ASP-DAC&#8217;20]<\/b> B. Zhang, N. Uysal, D. Fan, and R. Ewetz, &#8220;Representable Matrices: Enabling High Accuracy Analog Computation for Inference of DNNs using Memristors\u201d, <em>Asia and South Pacific Design Automation Conference (ASP-DAC)<\/em>, 2020.<\/li>\n<li><b>[DAC&#8217;19]<\/b> Z. He, J. Lin, R. Ewetz, J.-S. Yuan and D. Fan, &#8220;Noise Injection Adaption: End-to-End ReRAM Crossbar Non-ideal Effect Adaption for Neural Network Mapping\u201d, <em>Design Automation Conference (DAC)<\/em>, Las Vegas, NV, June 2-6, 2019.<\/li>\n<li><b>[GLSVLSI&#8217;19]<\/b> B. Zhang, N. Uysal, and R. Ewetz, &#8220;STAT: Mean and Variance Characterization for Robust Inference of DNNs on Memristor-based Platforms\u201d, <em>Great Lakes Symposium on VLSI (GVLSI)<\/em>, Tysons Corner, VA, May. 9-11, 2019.<\/li>\n<li><b>[ASP-DAC&#8217;19]<\/b> N. Uysal, W.-H. Liu, and R. Ewetz, &#8220;Latency Constraint Guided Buffer Sizing and Layer Assignment for Clock Trees with Useful Skew\u201d, <em>Asia and South Pacific Design Automation Conference (ASP-DAC)<\/em>, Japan, Jan. 21-24, 2019.<\/li>\n<li><b>[ASP-DAC&#8217;19]<\/b> B. Zhang, N. Uysal, D. Fan, and R. Ewetz, &#8220;Handling Stuck-at-faults in Memristor Crossbar Arrays using Matrix Transformations\u201d, <em>Asia and South Pacific Design Automation Conference (ASP-DAC)<\/em>, Japan, Jan. 21-24, 2019. (<span style=\"color: red\"><strong>Best Paper Candidate<\/strong><\/span>)<\/li>\n<li><b>[ICCD&#8217;18]<\/b> B. Zhang and R. Ewetz, &#8220;Software and Hardware Techniques for Reducing the Impact of Quantization Errors in Memristor Crossbar Arrays\u201d, <em>International Conference on Computer Design (ICCD)<\/em>, Orlando, Oct. 7-10, 2018.<\/li>\n<li><b>[ASP-DAC&#8217;18]<\/b> N. Uysal and R. Ewetz, &#8220;OCV Guided Clock Tree Topology Reconstruction\u201d, <em>Asia and South Pacific Design Automation Conference (ASP-DAC)<\/em>, Korea, Jan. 22-25, 2018.<\/li>\n<li><b>[ASP-DAC&#8217;18]<\/b> C. Tan, R. Ewetz, and C-K. Koh, &#8220;Clustering of Flip-Flops for Useful-Skew Clock Tree Synthesis\u201d, <em>Asia and South Pacific Design Automation Conference (ASP-DAC)<\/em>, Korea, Jan. 22-25, 2018.<\/li>\n<li><b>[DAC&#8217;17]<\/b> R. Ewetz, \u201cA Clock Tree Optimization Framework with Predictable Timing Quality\u201d, <em>Design Automation Conference (DAC)<\/em>, Austin, TX, June. 19-22, 2017.<\/li>\n<li><b>[ISPD&#8217;17]<\/b> R. Ewetz and C-K. Koh, \u201cClock Tree Construction based on Arrival Time Constraints\u201d, <em>International Symposium on Physical Design (ISPD)<\/em>, Portland, OR, March. 19-22, 2017.<\/li>\n<li><b>[ASP-DAC&#8217;17]<\/b> S. Han, W.-H Liu, R. Ewetz, C.-K Koh, K.-Y Chao, and T.-C Wang, \u201cDelay-driven Layer Assignment for Advanced Technology Nodes\u201d, <em>Asia and South Pacific Design Automation Conference (ASP-DAC)<\/em>, 2017.<\/li>\n<li><b>[ISPD&#8217;16]<\/b> R. Ewetz, C. Tan, and C-K. Koh, \u201cConstruction of Latency-Bounded Clock Trees\u201d, <em>International Symposium on Physical Design (ISPD)<\/em>, Santa Rosa, CA, Apr. 3-6, 2016. <a href=\"http:\/\/dl.acm.org\/citation.cfm?id=2872349\">[pdf]<\/a><\/li>\n<li><b>[ASP-DAC&#8217;16]<\/b> R. Ewetz and C-K. Koh, \u201cMCMM Clock Tree Optimization based on Slack Redistribution Using a Reduced Slack Graph\u201d, <em>Asia and South Pacific Design Automation Conference (ASP-DAC)<\/em>, Macau, Macau, Jan. 25-28, 2016. <a href=\"http:\/\/ieeexplore.ieee.org\/document\/7428039\/?arnumber=7428039\">[pdf]<\/a><\/li>\n<li><b>[DAC&#8217;15]<\/b> R. Ewetz, S. Janarthanan, and C-K. Koh, \u201cConstruction of Reconfigurable Clock Trees for MCMM Designs\u201d, <em>Design Automation Conference (DAC)<\/em>, San Francisco, CA, Jun. 7-11, 2015. <a href=\"http:\/\/dl.acm.org\/citation.cfm?id=2744811\">[pdf]<\/a><\/li>\n<li><b>[ISPD&#8217;15]<\/b> R. Ewetz and C-K. Koh, \u201cUseful Skew Tree Framework for Inserting Large Safety Margins\u201d, <em>International Symposium on Physical Design (ISPD)<\/em>, Monterey, CA, Mar. 7- Apr. 1, 2015. <a href=\"http:\/\/dl.acm.org\/citation.cfm?id=2717773\">[pdf] <\/a><\/li>\n<li><b>[ASP-DAC&#8217;15]<\/b> R Ewetz, S. Janarthanan, and C.-K Koh., \u201cFast Clock Skew Scheduling based on Sparse-Graph Algorithms\u201d, <em>Asia and South Pacific Design Automation Conference (ASP-DAC)<\/em>, Chiba\/Tokyo, Japan, Jan. 25-28, 2015. <a href=\"http:\/\/ieeexplore.ieee.org\/document\/7059051\/\">[pdf] <\/a><\/li>\n<li><b>[GLS-VLSI&#8217;14]<\/b> R. Ewetz, A. Udupa G. Subbarayan, and C.-Kok Koh., \u201cA TSV-cross-link-based approach to 3D-Clock Network Synthesis for Improved Robustness\u201d,<em> ACM Great Lakes Symposium on VLSI (GLS-VLSI)<\/em>, Huston, US, May 21-23, 2014. <a href=\"http:\/\/dl.acm.org\/citation.cfm?id=2591584\">[pdf] <\/a><\/li>\n<li><b>[GLS-VLSI&#8217;14]<\/b> R. Ewetz, W.-H Liu, K.-Y Chao, T.-C Wang, and C.-K Koh., \u201cA Study on the use of Parallel Wiring Techniques for Sub-20nm Designs\u201d,<em>ACM Great Lakes Symposium on VLSI (GLS-VLSI)<\/em>, Huston, US, May 21-23, 2014. <a href=\"http:\/\/dl.acm.org\/citation.cfm?id=2591588\">[pdf] <\/a><\/li>\n<li><b>[ISPD&#8217;13]<\/b> R. Ewetz and C.-K Koh., \u201cLocal Merges for Effective Redundancy in Clock Networks\u201d,<em> International Symposium on Physical Design (ISPD)<\/em>, Lake Tahoe, US, Jun. 24-27, 2013. <a href=\"http:\/\/dl.acm.org\/citation.cfm?id=2451957\">[pdf]<\/a><\/li>\n<\/ol>\n","protected":false},"excerpt":{"rendered":"<p>JOURNAL PUBLICATIONS [TODAES&#8217;24] M. Rashed, S. Thijssen, S. Jha, and R. Ewetz, &#8220;LOGIC: Logic Synthesis for Digital In-Memory Computing&#8221;, Transactions on Design Automation of Electronic Systems, 2024. [TAI&#8217;24] I. Alkhouri, S. Jha, A. Beckus, G. Atia, S. Jha, R. Ewetz, and A. Velasquez, &#8220;Exploring The Predictive Capabilities of AlphaFold Using Adversarial Protein Sequences&#8221;, in IEEE [&hellip;]<\/p>\n","protected":false},"author":1351,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"page-templates\/page-section-nav.php","meta":{"_acf_changed":false,"inline_featured_image":false,"featured_post":"","footnotes":"","_links_to":"","_links_to_target":""},"class_list":["post-49","page","type-page","status-publish","hentry"],"acf":[],"_links":{"self":[{"href":"https:\/\/faculty.eng.ufl.edu\/ewetz\/wp-json\/wp\/v2\/pages\/49","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/faculty.eng.ufl.edu\/ewetz\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/faculty.eng.ufl.edu\/ewetz\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/faculty.eng.ufl.edu\/ewetz\/wp-json\/wp\/v2\/users\/1351"}],"replies":[{"embeddable":true,"href":"https:\/\/faculty.eng.ufl.edu\/ewetz\/wp-json\/wp\/v2\/comments?post=49"}],"version-history":[{"count":2,"href":"https:\/\/faculty.eng.ufl.edu\/ewetz\/wp-json\/wp\/v2\/pages\/49\/revisions"}],"predecessor-version":[{"id":129,"href":"https:\/\/faculty.eng.ufl.edu\/ewetz\/wp-json\/wp\/v2\/pages\/49\/revisions\/129"}],"wp:attachment":[{"href":"https:\/\/faculty.eng.ufl.edu\/ewetz\/wp-json\/wp\/v2\/media?parent=49"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}