{"id":217,"date":"2020-08-19T13:07:25","date_gmt":"2020-08-19T13:07:25","guid":{"rendered":"http:\/\/dforte.ece.ufl.edu\/?page_id=217"},"modified":"2026-04-08T08:08:45","modified_gmt":"2026-04-08T13:08:45","slug":"publications","status":"publish","type":"page","link":"https:\/\/faculty.eng.ufl.edu\/dforte\/publications\/","title":{"rendered":"Publications"},"content":{"rendered":"\n
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NOTE: This directory contains pdf\/ps files of articles that may be covered by copyright. You may browse the articles at your convenience, in the same spirit as you may read a journal or a proceedings article in a public library. Retrieving, copying, or distributing these files may violate copyright protection laws.<\/p>\n<\/blockquote>\n\n\n\n

Books<\/h2>\n\n\n\n
    \n
  1. M. Tehranipoor, D. Forte<\/b>, G. Rose, S. Bhunia, Security Opportunities in Nano Devices and Emerging Technologies<\/i>, CRC Press, 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
  2. D. Forte<\/b>, S. Bhunia, M. Tehranipoor, Hardware Protection through Obfuscation<\/i>, Springer, 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
  3. M. Tehranipoor, U. Guin, D. Forte<\/b>, Counterfeit Integrated Circuits: Detection and Avoidance<\/i>, Springer 2015. [link<\/b><\/a>] <\/span><\/li>\n<\/ol>\n\n\n\n

    Book Chapters<\/h2>\n\n\n\n
      \n
    1. A. Covic, S. Chowdhury, RY Acharya, F. Ganji, D. Forte<\/b>, “Post-Quantum Hardware Security: Physical Security in Classic vs. Quantum Worlds,” in Emerging Topics in Hardware Security by Mark M. Tehranipoor, Springer, 2020. [link<\/a>]<\/li>\n\n\n\n
    2. H. Lu, DE Capecci, P. Ghosh, D. Forte<\/b>, DL Woodard, “Computer Vision for Hardware Security,” in Emerging Topics in Hardware Security<\/i>, Mark M. Tehranipoor, Springer, 2021. [link<\/a>]<\/li>\n\n\n\n
    3. Q. Shi, D. Forte<\/b>, M. Tehranipoor, “Deterrent Approaches Against Hardware Trojan Insertion,” in The Hardware Trojan War<\/i>: Attacks, Myths, and Defenses<\/i>, Swarup Bhunia and Mark M. Tehranipoor, Springer, 2018. [link<\/b><\/a>]<\/li>\n\n\n\n
    4. F. Rahman, A. Nath, D. Forte<\/b>, S. Bhunia, and M Tehranipoor, “Nano CMOS Logic-Based Security Primitive Design”, in Security Opportunities in Nano Devices and Emerging Technologies<\/i> by Mark M. Tehranipoor, Domenic Forte<\/b>, Garrett Rose, and Swarup Bhunia, CRC Press, 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
    5. H.T. Shen, F. Rahman, M. Tehranipoor, D. Forte<\/b>, “Carbon-Based Novel Devices for Hardware Security”, in Security Opportunities in Nano Devices and Emerging Technologies<\/i> by Mark M. Tehranipoor, Domenic Forte<\/b>, Garrett Rose, and Swarup Bhunia, CRC Press, 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
    6. F. Rahman, A. Nath, S. Bhunia, D. Forte<\/b>, M. Tehranipoor, “Composition of Physical Unclonable Functions: From Device to Architecture”, in Security Opportunities in Nano Devices and Emerging Technologies<\/i> by Mark M. Tehranipoor, Domenic Forte<\/b>, Garrett Rose, and Swarup Bhunia, CRC Press, 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
    7. B. Shakya, X. Xu, N. Asadizanjani, M. Tehranipoor, D. Forte<\/b>, “Leveraging Circuit Edit for Low-Volume Trusted Nanometer Fabrication”, in Security Opportunities in Nano Devices and Emerging Technologies <\/i>by Mark M. Tehranipoor, Domenic Forte<\/b>, Garrett Rose, and Swarup Bhunia, CRC Press, 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
    8. B. Shakya, M. Tehranipoor, S. Bhunia, D. Forte<\/b>, “Introduction to Hardware Obfuscation: Motivation, Methods and Evaluation,” in Hardware Protection through Obfuscation <\/i>by Domenic Forte<\/b>, Swarup Bhunia, and Mark M. Tehranipoor, Springer, 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
    9. Z. Guo, M. Tehranipoor, D. Forte<\/b>, “Permutation-Based Obfuscation,” in Hardware Protection through Obfuscation<\/i> by Domenic Forte<\/b>, Swarup Bhunia, and Mark M. Tehranipoor, Springer, 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
    10. M. T. Rahman, D. Forte<\/b>, M. Tehranipoor, “Protection of Assets from Scan Chain Vulnerabilities through Obfuscation,” in Hardware Protection through Obfuscation<\/i> by Domenic Forte<\/b>, Swarup Bhunia, and Mark M. Tehranipoor, Springer, 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
    11. Q. Shi, K. Xiao, D. Forte<\/b>, M. Tehranipoor, “Obfuscated Built-in Self Authentication,” in Hardware Protection through Obfuscation<\/i> by Domenic Forte,<\/b> Swarup Bhunia, and Mark M. Tehranipoor, Springer, 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
    12. A. Nahiyan, K. Xiao, D. Forte<\/b>, M. Tehranipoor, “Security Rule Check,” in Hardware IP Security and Trust<\/i> by Prabhat Mishra, Swarup Bhunia and Mark Tehranipoor, Springer, 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
    13. Q. Shi, D. Forte<\/b>, M. Tehranipoor, “Analyzing Circuit Layout to Probing Attack,” in Hardware IP Security and Trust <\/i>by Prabhat Mishra, Swarup Bhunia and Mark Tehranipoor, Springer, 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
    14. K. Xiao, D. Forte,<\/b> M. Tehranipoor,  “Circuit Timing Signature (CTS) for Detection of Counterfeit Integrated Circuits,” in Secure System Design and Trustable Computing<\/i>, by Chip Hong Chang and Miodrag Potkonjak, 2016. [link<\/b><\/a>]<\/li>\n<\/ol>\n\n\n\n

      Journal<\/h2>\n\n\n\n
        \n
      1. KA Vedros, H. Squires, C. Kolias, D. Forte<\/strong>, D. Barbara, “Reading Between the Signals: A Comprehensive Tutorial on Harnessing Physical Side-Channels for Anomaly Detection”, IEEE Access, 2026. [link<\/a>]<\/li>\n\n\n\n
      2. KA Vedros, A. Vakanski, D. Forte<\/strong>, C. Kolias, “From Capture-Recapture to No Recapture: Efficient SCAD Even After Software Updates\u201d, MDPI Sensors, 2025. [link<\/a>]<\/li>\n\n\n\n
      3. MM Rizvee, FS Shishir, T. Hossain. T. Hoque, D. Forte<\/strong>, S. Shomaji, \u201cA Persistent Hierarchical Bloom Filter-based Framework for Scalable Authentication and Tracking of ICs\u201d, ACM Journal on Emerging Technologies in Computing (JETC), 2025. [link<\/a>]<\/li>\n\n\n\n
      4. S. Roy, A. Cannon, L. Mata, R. Acharya, T. Farheen, S. Tajik, D. Forte<\/strong>, \u201cSense and React: Self-Destructive Polymorphic Mechanism Against Voltage Tampered Active Physical Attacks\u201d, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 2025. [link<\/a>]<\/li>\n\n\n\n
      5. O. Dizon-Paradis, D. Koblah, R. Wilson, D. Forte<\/strong>, D. Woodard, \u201cIC SEM Reverse Engineering Tutorial using Artificial Intelligence\u201d, IEEE Design & Test, 2025. [link<\/a>]<\/li>\n\n\n\n
      6. M. Hashemi, D. Forte<\/strong>, F. Ganji, \u201cGuardianMPC: Backdoor-resilient Neural Network Computation\u201d, IEEE Access, 2025. [link<\/a>]<\/li>\n\n\n\n
      7. J. Wu, O. Dizon-Paradis, S. Rahman, D. Woodard, D. Forte<\/strong>, \u201cProtecting Dynamically Obfuscated Scan Chain Architecture from DOSCrack with Trivium Pseudo Random Number Generation\u201d, Cryptography, 2025. [link<\/a>]<\/li>\n\n\n\n
      8. DM Mehta, M. Hashemi, DS Koblah,<\/span> D. Forte<\/span><\/strong>, F. Ganji, “Bake It Till You Make It: Heat-induced <\/span>Power Leakage from Masked Neural Networks”, <\/span>IACR Transactions on Cryptographic Hard<\/span>ware and Embedded Systems (TCHES)<\/span>, Sept. 2024. [link<\/a>]<\/span><\/li>\n\n\n\n
      9. DM Meta, M. Hashemi, D. Forte<\/strong>, S. Tajik, F. Ganji, “1\/0 Shades of UC: Photonic Side-Channel Analysis of Universal Circuits”, IACR Transactions on Cryptographic Hardware and Embedded Systems, Sept. 2024. [link<\/a>]<\/li>\n\n\n\n
      10. S. Roy, J. Chen, N. Maghari, D. Forte<\/strong>, “Recycled Counterfeit Chips Detection for AMS and Digital ICs Using Low-Area, Self-Contained, and Secure LDO Odometers”, Journal of Hardware and Systems Security (HaSS), 2024. [link<\/a>]<\/li>\n\n\n\n
      11. M. Hasan, T. Hoque, F. Ganji, D. Woodard,<\/span> D. Forte<\/span><\/strong>, S. Shomaji, “A Resource-efficient Binary CNN <\/span>Implementation for Enabling Contactless IoT Authentication”,<\/span> Journal of Hardware and <\/span>Systems Security (HaSS)<\/span>, July 2024. [link<\/a>]<\/span><\/li>\n\n\n\n
      12. D. Forte<\/strong>, B. Amaba, C. Richards, J. Daniels, “Nowhere to Hide: Monitoring Side-channels for Supply Chain Resiliency”, IEEE Reliability Magazine, Vol. 1, No. 2, June 2024. [pdf<\/a>]<\/li>\n\n\n\n
      13. M. Gao, L. Biswas, N. Asadi,<\/span> D. Forte<\/span><\/strong>, “Detour\u2013RS: Reroute Attack Vulnerability Assessment with Awareness of Layout and Resource”, Cryptography, Vol. 8, No. 2, 2024. [link<\/a>]<\/span><\/li>\n\n\n\n
      14. P. Ghosh, G. Lee, M. Zhu , O. Dizon-Paradis, UJ Botero, D. Woodard,<\/span> D. Forte<\/span><\/strong>, “MaGNIFIES: Manageable GAN Image Augmentation Framework for Inspection of Electronic Systems\u201d Journal of Hardware and Systems Security (HaSS), 2024. [<\/span>link<\/a>]<\/li>\n\n\n\n
      15. J. Wu,<\/span> D. Forte<\/span><\/strong>, “EXERTv2: Exhaustive Integrity Analysis for Information Flow Security with FSM Integration\u201d, Journal of Hardware and Systems Security (HaSS), 2023. [<\/span>link<\/a>]<\/li>\n\n\n\n
      16. R. Wilson, O. Dizon-Paradis, D. Forte<\/strong>, D. Woodard, \u201cSECURE: A Segmentation Quality Evaluation Metric on SEM images for Reverse Engineering on Integrated Circuits\u201d, IEEE Access, Vol. 11, 2023. [link<\/a>]<\/li>\n\n\n\n
      17. M. Gao, MS Rahman, N. Varshney, M. Tehranipoor, D. Forte<\/strong>, “iPROBE: Internal Shielding Approach for Protecting Against Front-side and Back-side Probing Attack,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 42, No. 12, December 2023. [link<\/a>]<\/li>\n\n\n\n
      18. D. Koblah, UJ Botero, SP Costello, O. Paradis, F. Ganji, D. Woodard, D. Forte<\/strong>, “A Fast Object Detection-Based Framework for Via Modeling on PCB X-Ray CT Images”, ACM Journal on Emerging Technologies in Computing Systems (JETC), Vol. 19, No. 4, October 2023. [link<\/a>]<\/li>\n\n\n\n
      19. M. Choudhury, M. Gao, A. Varna, E. Peer, D. Forte<\/strong>, “Enhanced PATRON: Fault Injection and Power-aware FSM Encoding Through Linear Programming”, ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 28, No. 6, October 2023. [link<\/a>]<\/li>\n\n\n\n
      20. R. Acharya, F. Ganji, D. Forte<\/strong>, “Information Theory-based Evolution of Neural Networks for Side-channel Analysis”, IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES), September 2023. [link<\/a>]<\/li>\n\n\n\n
      21. D. Koblah, O. Dizon-Paradis, J. Schubeck, UJ Botero, D. Woordard, D. Forte<\/strong>, “A Comprehensive Taxonomy of Visual Printed Circuit Board Defects,” Journal of Hardware and Systems Security (HaSS), April 2023. [link<\/a>]<\/li>\n\n\n\n
      22. T. Bryant, Y. Chen, D. Koblah, D. Forte<\/strong>, N. Maghari, “A Brief Tutorial on Mixed Signal Approaches to Combat Electronic Counterfeiting,” IEEE Open Journal of Circuits and Systems, Vol. 4, March 2023. [link<\/a>]<\/li>\n\n\n\n
      23. T. Farheen, S. Roy, S. Tajik, D. Forte<\/strong>, \u201cA Twofold Clock and Voltage-based Detection Method for Laser Logic State Imaging Attack\u201d, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Vol. 31, No. 1, January 2023. [link<\/a>]<\/li>\n\n\n\n
      24. D. Koblah, R. Acharya,  D. Capecci, O. Dizon-Paradis, S. Tajik, F. Ganji, D. Woodard, D. Forte<\/strong>, “A Survey and Perspective on Artificial Intelligence for Security-Aware Electronic Design Automation\u201d, ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 28, No. 2, March 2023. [preprint<\/a>] [link<\/a>]<\/li>\n\n\n\n
      25. S. Amir and D. Forte<\/strong>, “EigenCircuit: Divergent Synthetic Benchmark Generation for Hardware Security Using PCA and Linear Programming\u201d, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 41, No. 12, December 2022. [link<\/a>]<\/li>\n\n\n\n
      26. Y. Bai, A. Stern, J. Park, M. Tehranipoor, D. Forte,<\/strong> “RASCv2: Enabling Remote Access to Side-Channels for Mission Critical and IoT Systems “, ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 27, No. 1, Nov. 2022. [link<\/a>]<\/li>\n\n\n\n
      27. Y. Bai, J. Park, M. Tehranipoor, D. Forte<\/strong>, “Real-time Instruction-level Verification of Remote IoT\/CPS Devices Via Side Channels”, Discover Internet of Things Journal, Vol. 2, No. 1, March 2022. [link<\/a>]<\/li>\n\n\n\n
      28. S. Shomaji, P. Ghosh, F. Ganji, DL Woodard, D. Forte<\/strong>, “An Analysis of Enrollment and Query Attacks on Hierarchical Bloom Filter-based Biometric Systems”, IEEE Transactions on Information Forensics and Security (TIFS), Vol. 16, Nov. 2021.<\/li>\n\n\n\n
      29. B. Park, D. Forte<\/strong>, M. Tehranipoor, N. Maghari, “A Metal-Via Resistance based Physically Unclonable Function with Backend Incremental ADC”, IEEE Transactions on Circuits and Systems I, Vol 68, No. 11, Nov. 2021. [link<\/a>]<\/li>\n\n\n\n
      30. S. Shomaji, Z. Guo, F. Ganji, N. Karimian, DL Woodard, D. Forte,<\/strong> “”BLOcKeR: A Biometric Locking Paradigm for IoT and the Connected Person”, Journal of Hardware and Systems Security (HaSS), Vol. 5, No. 3, Oct. 2021. [link<\/a>]<\/li>\n\n\n\n
      31. S. Shomaji, NVR Masna, DJ Ariando, SD Paul, K. Horace-Herron,D. Forte<\/strong>, S. Mandal, S. Bhunia, “Detecting Dye-Contaminated Vegetables using Low-Field NMR Relaxometry”, Foods, Vol. 10, No. 9, Sept. 2021. [link<\/a>]<\/li>\n\n\n\n
      32. R. Wilson, H. Lu, M. Zhu, D. Forte<\/strong>, DL Woodard, “REFICS: Assimilating Data-Driven Paradigms into Reverse Engineering and Hardware Assurance on Integrated Circuits”, IEEE Access, Vol. 9, Sept. 2021. [link<\/a>]<\/li>\n\n\n\n
      33. UJ Botero, R. Wilson, H. Lu, MT Rahman, MA Mallaiyan, F. Ganji, N. Asadizanjanizanjani, MM Tehranipoor, DL Woodard, D. Forte<\/strong>, “Hardware Trust and Assurance through Reverse Engineering: A Tutorial and Outlook from Image Analysis and Machine Learning Perspectives”, ACM Journal on Emerging Technologies in Computing Systems (JETC), Vol. 17, No. 4, June 2021. [preprint<\/a>] [link<\/a>]<\/li>\n\n\n\n
      34. MS Rahman, A. Nahiyan, F. Rahman, S. Fazzari, K. Plaks, F. Farahmandi, D. Forte<\/strong>, M. Tehranipoor, “”Security Assessment of Dynamically Obfuscated Scan Chain Against Oracle-guided Attacks”‘, ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 26, No. 4, March 2021. [link<\/a>]<\/li>\n\n\n\n
      35. S. Chowdhury, A. Covic, R. Acharya, S. Dupee, F. Ganji, D. Forte<\/strong>, “Physical Security in the Post-quantum Era: A Survey on Side-channel Analysis, Random Number Generators, and Physically Unclonable Functions”, Journal of Cryptographic Engineering (JCEN), 2021. [link<\/a>]<\/li>\n\n\n\n
      36. H. Wang, Q. Shi, A. Nahiyan, D. Forte<\/b>, M. Tehranipoor, “A Physical Design Flow against Front-side Probing Attacks by Internal Shielding”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 39, No. 10, October 2020. [link<\/b><\/a>]<\/li>\n\n\n\n
      37. S. Chowdury, F. Ganji, D. Forte,<\/strong> “Recycled SoC Detection using LDO Degradation”, SN Computer Science, September 2020. [link<\/a>]<\/li>\n\n\n\n
      38. N. Karimian, D. Woodard, D. Forte<\/b>, “ECG Biometric: Spoofing and Countermeasures”, IEEE Transactions on Biometrics, Behavior, and Identity Science (T-BIOM), Vol. 2, No. 3, July 2020. [link<\/b><\/a>]<\/li>\n\n\n\n
      39. M. Alam, A. Nahiyan, M. Sadi, D. Forte,<\/b> M. Tehranipoor, “Soft-HaT: Software-based Silicon Reprogramming for Hardware Trojan Implementation,” ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 25, No. 4, June 2020. [link<\/b><\/a>]<\/li>\n\n\n\n
      40. F. Ganji, S. Tajik, P. Stauss, J.-P. Seifert, M. Tehranipoor, D. Forte<\/b>, “Rock’n’roll PUFs: Crafting Provably Secure PUFs from Less Secure Ones (Extended Version),” Journal of Cryptographic Engineering (JCEN), May 2020. [link<\/b><\/a>]<\/li>\n\n\n\n
      41. A. Nahiyan, J. Park, H. Miao, Y. Iskander, F. Farahmandi, D. Forte<\/b>, M. Tehranipoor, “SCRIPT: A CAD Framework for Power Side-channel Vulnerability Assessment using Information Flow Tracking and Pattern Generation”, ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 25, No. 3, May 2020. [link<\/b><\/a>]<\/li>\n\n\n\n
      42. MT Rahman, MS Rahman, H. Wang, S. Tajik, W. Khalil, F. Farahmandi, D. Forte<\/b>, N. Asadizanjani, M. Tehranipoor, “Defense-in-Depth: A Recipe for Logic Locking to Prevail”, Integration, the VLSI Journal, Vol. 72, May 2020. [link<\/b><\/a>]<\/li>\n\n\n\n
      43. A. Stern, U.J. Botero, F. Rahman,  D. Forte<\/b>, M. Tehranipoor, “EMFORCED: EM-Based Fingerprinting Framework for Remarked and Cloned Counterfeit IC Detection using Machine Learning Classification”, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Vol. 28, No. 2, February 2020. [link<\/b><\/a>]<\/li>\n\n\n\n
      44. Z. Guo, S. Chowdury, M. Tehranipoor, D. Forte<\/b>, “Permutation Network De-obfuscation: A Delay-based Attack and Countermeasure Investigation”, ACM Journal on Emerging Technologies in Computing Systems (JETC), Vol. 16, No. 2, January 2020. [link<\/b><\/a>]<\/li>\n\n\n\n
      45. B. Shakya, X. Xu, M. Tehranipoor, D. Forte<\/b>, “CAS-Lock: A Security-Corruptibility Trade-off Resilient Logic Locking Scheme”, IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES), No. 1, 2020. [link<\/b><\/a>]<\/li>\n\n\n\n
      46. J. Park, F. Rahman, A. Vassilev, D. Forte<\/b>, M. Tehranipoor, “Leveraging Side-channel Information for Disassembly and Security”, ACM Journal on Emerging Technologies in Computing (JETC), Vol. 16, No. 1, December 2019. [link<\/b><\/a>]<\/li>\n\n\n\n
      47. T. Hoque, K. Yang, R. Karam, S. Tajik, D. Forte<\/b>, M. Tehranipoor, S. Bhunia, “Hidden in Plaintext: An Obfuscation-based Countermeasure against FPGA Bitstream Tampering Attacks”, ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 25, No. 1, December 2019. [link<\/b><\/a>]<\/li>\n\n\n\n
      48. M. Alam, M. Tehranipoor, D. Forte<\/b>, “Recycled FPGA Detection Using Exhaustive LUT Path Delay Characterization and Voltage Scaling”, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Vol. 27, No.12, December 2019. [link<\/b><\/a>]<\/li>\n\n\n\n
      49. F. Ganji, D. Forte<\/b>, JP Seifert, “PUFmeter: A Property Testing Tool for Assessing the Robustness of Physically Unclonable Functions to Machine Learning Attacks”, IEEE Access, Vol. 7, No. 1, December 2019. [link<\/b><\/a>]<\/li>\n\n\n\n
      50. BM Talukder, B. Ray, D. Forte<\/b>, MT Rahman, “PreLatPUF: Exploiting DRAM Latency Variations for Generating Robust Device Signatures”, IEEE Access, Vol. 7, No. 1, December 2019. [link<\/b><\/a>]<\/li>\n\n\n\n
      51. N. Karimain, M. Tehranipoor, D. Woodard, D. Forte<\/b>, “Unlock Your Heart: Next Generation Biometric in Resource-Constrained Healthcare Systems and IoT”, IEEE Access, Vol. 7, No. 1, December 2019. [link<\/b><\/a>]<\/li>\n\n\n\n
      52. S. Shomaji, P. Dehghanzadeh, A. Roman, D. Forte<\/b>, S. Bhunia, S. Mandal, “Early Detection of Cardiovascular Diseases Using Wearable Ultrasound Device”, IEEE Consumer Electronics Magazine, Vol. 8, No. 6, November 2019. [link<\/b><\/a>]<\/li>\n\n\n\n
      53. Q. Shi, M. Tehranipoor, D. Forte<\/b>, “Obfuscated Built-In Self-Authentication with Secure and Efficient Wire-Lifting”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 38, No. 11, November 2019. [link<\/b><\/a>]<\/li>\n\n\n\n
      54. P. Ghosh, A. Bhattacharyay, D. Forte<\/b>, RS Chakraborty, “Automated Defective Pin Detection for Recycled Microelectronics Identification” Journal of Hardware and Systems Security (HaSS), Vol. 3, No. 3, September 2019. [link<\/b><\/a>]<\/li>\n\n\n\n
      55. B. Shakya, H. Shen, M. Tehranipoor, D. Forte<\/b>, “Covert Gates: Protecting Integrated Circuits with Undetectable Camouflaging”, IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES), August 2019 [link<\/b><\/a>]<\/li>\n\n\n\n
      56. X. Xu, F. Rahman, B. Shakya, A. Vassilev, D. Forte<\/b>, M. Tehranipoor, “Electronics Supply Chain Integrity Enabled by Blockchain”, ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 24, No. 3, June 2019. [link<\/b><\/a>]<\/li>\n\n\n\n
      57. H. Wang, Q. Shi. D. Forte<\/b>, M. Tehranipoor, “Probing Assessment Framework and Evaluation of Anti-probing Solutions”, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Vol. 27, No. 6, June 2019. [link<\/b><\/a>]<\/li>\n\n\n\n
      58. A. Nahiyan, F. Farahmandi, P. Mishra, D. Forte<\/b>, M. Tehranipoor, “Security-aware FSM Design Flow for Identifying and Mitigating Vulnerabilities to Fault Attacks”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 38, No. 6, June 2019. [link<\/b><\/a>]<\/li>\n\n\n\n
      59. F. Ganji, D. Forte<\/b>, N. Asadizanjani, M. Tehranipoor, D. Woodard, “The Power of IC Reverse Engineering for Hardware Trust and Assurance”, Electronic Device Failure Analysis (EDFA), May 2019. [link<\/b><\/a>]<\/li>\n\n\n\n
      60. F. Ganji, N. Karimian, D. Woodard, D. Forte<\/b>, “Leave Adversaries in the Dark- BLOcKeR: Secure and Reliable Biometric Access Control”, The Journal of the Homeland Defense and Security Information Analysis Center (HDIAC), Vol. 6, No. 1, Spring 2019. [link<\/b><\/a>]<\/li>\n\n\n\n
      61. U.J. Botero, M. Tehranipoor, D. Forte<\/b>, “Upgrade\/Downgrade: Efficient and Secure Legacy Electronic System Replacement”, IEEE Design & Test, Vol. 36, No. 1, February 2019. [link<\/b><\/a>]<\/li>\n\n\n\n
      62. K. Yang, U.J. Botero, H. Shen, D. Woodard, D. Forte<\/b>, M. Tehranipoor, “UCR: An Unclonable Environmentally-Sensitive Chipless RFID Tag For Protecting Supply Chain”, ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 23, No. 6, December 2018. [link<\/b><\/a>]<\/li>\n\n\n\n
      63. X. Xu, S. Keshavarz, D. Forte<\/b>, M. Tehranipoor, D.E. Holcomb, “Bimodal Oscillation as a Mechanism for Autonomous Majority Voting in PUFs”, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Vol. 26, No. 11, November 2018. [link<\/b><\/a>]<\/li>\n\n\n\n
      64. S. Amir, B. Shakya, X. Xu, Y. Jin, S. Bhunia, M. Tehranipoor, D. Forte<\/b>, “Development and Evaluation of Hardware Obfuscation Benchmarks”, Journal of Hardware and Systems Security (HaSS), Vol. 2, No. 2, June 2018. [link<\/b><\/a>]<\/li>\n\n\n\n
      65. Z. Guo, X. Xu, M. Tehranipoor, D. Forte<\/b>, “SCARe: An SRAM-based Countermeasure Against IC Recycling Framework\u201d, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Vol. 26, No. 3, April 2018. [link<\/b><\/a>]<\/li>\n\n\n\n
      66. M.M. Alam, S. Chowdhury, B. Park, D. Munzer, N. Maghari, M. Tehranipoor, D. Forte<\/b>, “Challenges and Opportunities in Analog and Mixed Signal (AMS) Integrated Circuit (IC) Security”, Journal of Hardware and Systems Security (HaSS), Vol. 2, No. 1, March 2018. [link<\/b><\/a>]<\/li>\n\n\n\n
      67. K. Yang, D. Forte<\/b>, M. Tehranipoor, “ReSC: An RFID-Enabled Solution for Defending IoT Supply Chain”, ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 23, No. 3, February 2018. [link<\/b><\/a>]<\/li>\n\n\n\n
      68. K. Yang, H. Shen, D. Forte<\/b>, S. Bhunia, M. Tehranipoor, “Hardware-Enabled Pharmaceutical Supply Chain Security”, ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 23, No. 3, January 2018. [link<\/b><\/a>]<\/li>\n\n\n\n
      69. F. <\/b>Rahman, B. Shakya, X. Xu, D. Forte<\/b>, M. Tehranipoor, “Security Beyond CMOS: Fundamentals, Applications, and Roadmap”, IEEE Transactions on Very Large Scale Integration Systems, Vol. 25, No. 12, December 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
      70. H. Shen, F. Rahman, B. Shakya, X. Xu, M. Tehranipoor, D. Forte<\/b>, “Poly-Si Based Physical Unclonable Functions”, IEEE Transactions on Very Large Scale Integration Systems, Vol. 25, No. 11, November 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
      71. E.L. Principe, N. Asadizanjani, D. Forte<\/b>, M. Tehranipoor, R. Chivas, M. DiBattista, S. Silverman, “Plasma FIB Deprocessing of Integrated Circuits from the Backside”, Electronic Device Failure Analysis (EDFA), Vol. 19, No. 4, November 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
      72. H. Wang, Q. Shi, D. Forte<\/b>, M. Tehranipoor, “Probing Attacks on Integrated Circuits: Challenges and Research Opportunities”, IEEE Design & Test, Vol. 34, No. 5, October 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
      73. M.T. Rahman, A. Hosey, Z. Guo, J. Carroll, D. Forte<\/b>, M. Tehranipoor, “Systematic Correlation and Cell Neighborhood Analysis of SRAM-PUF for Robust and Unique Key Generation,” Journal of Hardware and Systems Security (HaSS), Vol. 1, No. 2, June 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
      74. N. Karimian, Z. Guo, M. Tehranipoor, D. Forte, <\/b>“Highly Reliable Key Generation from Electrocardiogram (ECG)” IEEE Transactions on Biomedical Engineering, Vol. 64, No. 6, June 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
      75. U. Guin, S. Bhunia, D. Forte<\/b>, M. Tehranipoor, “SMA: A System-Level Mutual Authentication for Protecting Electronic Hardware and Firmware,” IEEE Transactions on Dependable and Secure Computing (TDSC), Vol. 14, No. 3, May-June 1 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
      76. Z. Guo, J. Di, M. Tehranipoor, D. Forte<\/b>, “Obfuscation-based Protection Framework Against Printed Circuit Boards Unauthorized Operation and Reverse Engineering”, ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 22, No. 3, April 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
      77. K. Yang, D. Forte<\/b>, M. Tehranipoor, “CDTA: A Comprehensive Solution for Counterfeit Detection, Traceability and Authentication in IoT Supply Chain,” ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 22, No. 3, April 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
      78. B. Shakya, T. He, H. Salmani, D. Forte<\/b>, S. Bhunia, M. Tehranipoor, “Benchmarking of Hardware Trojans and Maliciously Affected Circuits”, Journal of Hardware and Systems Security (HaSS), Vol. 1, No. 1, April 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
      79. M. Alam, H. Shen, N. Asadizanjani, M. Tehranipoor, D. Forte<\/b>, “Impact of X-ray Tomography on the Reliability of Integrated Circuits”, IEEE Transactions on Device and Materials Reliability (TDMR), Vol. 17, No. 1, March 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
      80. N. Asadizanjani, M. Tehranipoor, D. Forte<\/b>, “PCB Reverse Engineering Using Non-destructive X-ray Tomography and Advanced Image Processing”, IEEE Transactions on Components, Packaging and Manufacturing (CPMT), Vol. 7, No. 2, February 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
      81. N. Asadizanjani, M. Tehranipoor,  D. Forte, “Counterfeit electronics detection using image processing and machine learning”, Journal of physics: conference series, Vol. 787, No. 1, February 2017. [link<\/a>]<\/li>\n\n\n\n
      82. K. Xiao, D. Forte<\/b>, Y. Jin, R. Karri, S. Bhunia, M. Tehranipoor, “Hardware Trojans: Lessons Learned After One Decade of Research”, ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 22, No. 1, June 2016. [link<\/b><\/a>] [2018 ACM TODAES Best Paper, ACM Computing Reviews Notable Computing Books and Articles 2016, <\/b>Hardware Category<\/b><\/a>]<\/b><\/em><\/li>\n\n\n\n
      83. U Guin, Q. Shi, D. Forte<\/b>, M. Tehranipoor, “FORTIS: A Comprehensive Solution for Establishing Forward Trust for Protecting IPs and ICs,” ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 21, No. 4, June 2016 [link<\/b><\/a>]<\/li>\n\n\n\n
      84. U. Guin, D. Forte<\/b>, M. Tehranipoor, “Design of Accurate Low-Cost On-Chip Structures for protecting Integrated Circuits against Recycling,” IEEE Transactions on VLSI Systems (TVLSI), Vol. 24, No. 4, April 2016. [link<\/b><\/a>]<\/li>\n\n\n\n
      85. S. E. Quadir, J. Chen, D. Forte<\/b>, N. Asadizanjani, S. Shahbazmohamadi, L. Wang, J. Chandy, M. Tehranipoor, “A Survey on Chip to System Reverse Engineering,” ACM Journal on Emerging Technologies in Computing Systems (JETC), Vol. 13, No.1, April 2016. [link<\/b><\/a>]<\/li>\n\n\n\n
      86. C. Bao, D. Forte<\/b>, A. Srivastava, \u201cOn Reverse Engineering-Based Hardware Trojan Detection,\u201d  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 34, No. 10, January 2016 [link<\/b><\/a>]<\/li>\n\n\n\n
      87. C. Bao, D. Forte<\/b>, A. Srivastava, “Temperature Tracking: Towards Robust Run-time Detection of Hardware Trojans,”  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 34, No. 10, October 2015 [link<\/b><\/a>]<\/li>\n\n\n\n
      88. M.T. Rahman, F. Rahman, D. Forte<\/b>, M. Tehranipoor, “An Aging-Resistant RO-PUF for Reliable Key Generation,” IEEE Transactions on Emerging Topics in Computing (TETC), September 2015. [link<\/b><\/a>]<\/li>\n\n\n\n
      89. A. Mazady, M.T. Rahman, D. Forte<\/b>, M. Anwar, “Memristor Nano-PUF A Security Primitive: Theory and Experiment,” IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS),    Vol. 5, No. 2, June 2015. [link<\/b><\/a>]<\/li>\n\n\n\n
      90. K. Xiao, D. Forte<\/b>, M. Tehranipoor, “A Novel Built-In Self Authentication Technique to Prevent Inserting Hardware Trojans”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 33, No. 12, December 2014. [link<\/b><\/a>]<\/li>\n\n\n\n
      91. D. Forte<\/b>, A. Srivastava, “Improving the Quality of Delay-based PUFs via Optical Proximity Correction”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 32, No. 12, December 2013 . [link<\/b><\/a>]<\/li>\n\n\n\n
      92. D. Forte<\/b>, A. Srivastava, “Thermal-Aware Sensor Scheduling for Distributed Estimation”, ACM Transactions on Sensor Networks (TOSN), Vol. 9, No. 4, November 2013. [link<\/b><\/a>]<\/li>\n\n\n\n
      93. D. Forte<\/b>, A. Srivastava, “Energy and Thermal-Aware Video Coding via Encoder\/Decoder Workload Balancing”, ACM Transactions on Embedded Computing Systems (TECS), Vol. 12, No. 2, May 2013. [link<\/b><\/a>]<\/li>\n\n\n\n
      94. D. Forte<\/b>, A. Srivastava, “Resource-Aware Architectures for Adaptive Particle Filter Based Visual Target Tracking”, ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 18, No. 2, April 2013. [link<\/b><\/a>]<\/li>\n<\/ol>\n\n\n\n

        Conference & Workshop<\/h2>\n\n\n\n
          \n
        1. G. Lee, W. Bowman, O. Dizon-Paradis, R. Dizon-Paradis, R. Wilson, D. Woodard, D. Forte<\/strong>, \u201cA Data-Free Membership Inference Attack on Federated Learning in Hardware Assurance\u201d, International Symposium on Quality Electronic Design (ISQED), April 2026. []<\/li>\n\n\n\n
        2. S. Wormald, G.Kravatsky, D. Woodard, D. Forte<\/strong>, \u201cResource Utilization of Differentiable Logic Gate Networks Deployed on FPGAs\u201d, GOMACTech, March 2026. []<\/li>\n\n\n\n
        3. M. Hussain, D. Koblah, R. Dizon-Paradis, D. Forte<\/strong>, \u201cCausal AI For AMS Circuit Design: Interpretable Parameter Effects Analysis\u201d, GOMACTech, March 2026. [link<\/a>]<\/li>\n\n\n\n
        4. J. Fan, D. Koblah, D. Forte<\/strong>, \u201cDisguising Topology and Side-Channel Information through Covert Gate- and ML-Enabled IP Camouflaging\u201d, GOMACTech, March 2026. [link<\/a>]<\/li>\n\n\n\n
        5. G. Lee, W. Bowman, O. Dizon-Paradis, R. Dizon-Paradis, R. Wilson, D. Woodard, D. Forte<\/strong>, \u201cDECIFR: Domain-aware Exfiltration of Circuit Information from Federated Gradient Reconstruction\u201d, GOMACTech, March 2026. []<\/li>\n\n\n\n
        6. G. Lee, W. Bowman, R. Dizon-Paradis, O. Dizon-Paradis, R. Wilson, D. Woodard, D. Forte<\/strong>, \u201cPotentials and Pitfalls of Applying Federated Learning in Hardware Assurance\u201d, International Symposium for Testing and Failure Analysis (ISTFA), Nov. 2025. []<\/li>\n\n\n\n
        7. J. Fan, D. Koblah, D. Forte<\/strong>, “Designing with Deception: ML- and Covert Gate-Enhanced Camouflaging to Thwart IC Reverse Engineering”, International Conference on Computer-Aided Design (ICCAD), Oct. 2025. [link<\/a>]<\/li>\n\n\n\n
        8. M Rizvee, P. Ghosh, D. Forte<\/strong>, S. Shomaji, \u201cDynamic Hierarchical Bloom Filters for Scalable Biometric Authentication Systems\u201d, International Joint Conference on Biometrics (IJCB), Sept. 2025. []<\/li>\n\n\n\n
        9. S. Roy, D. Forte<\/strong>, \u201cMUX-based Polymorphic Registers and FSMs to Protect Against Non-invasive Voltage Fault Injection Attacks\u201d, International Test Conference (ITC), Sept. 2025. [link<\/a>]<\/li>\n\n\n\n
        10. J. Wu, D. Forte<\/strong>, \u201cQuEST: Quantitative Entropy-based Security and Trojan Detection Framework for Confidentiality Verification\u201d, International Test Conference (ITC), Sept. 2025. [link<\/a>]<\/li>\n\n\n\n
        11. M. Thomas, D. Forte<\/strong>, N. Maghari, \u201cAsynchronous Threshold Voltage Defined Logic Family Resistant to LLSI Attacks\u201d, International Symposium on Circuits and Systems (ISCAS), May 2025. [pdf<\/a>]<\/li>\n\n\n\n
        12. C. Sobolewski, D. Koblah and D. Forte<\/strong>, \u201cA Framework for PCB Design File Reconstruction from X-ray CT Annotations\u201d, International Symposium on Quality Electronic Design (ISQED), April 2025. [pdf<\/a>]<\/li>\n\n\n\n
        13. M. Zhu, R. Wilson, RN Dizon-Paradis, OP. Dizon-Paradis, D. Forte<\/strong>, DL Woodard ,\u201cGenetic Algorithm-Assisted Golden-Free Standard Cell Library Extraction from SEM Images\u201d, International Symposium on Quality Electronic Design (ISQED), April 2025. [link<\/a>]<\/li>\n\n\n\n
        14. H. Wang, R. Dai, T. Yavuz, X. Guo, O.Arias, D. Sullivan, S. Dai, H. Yu, M. Lee, D. Forte<\/strong>, S. Wang ,\u201cCross-Layer EM Fault Injection Assessment Framework\u201d, International Symposium on Quality Electronic Design (ISQED), April 2025. [link<\/a>]<\/li>\n\n\n\n
        15. S. Wormald, D. Koblah, MK Maldaner, D. Forte<\/strong>, D. Woodard, \u201ceXpLogic: Explaining Logic Types and Patterns in DiffLogic Networks\u201d, International Conference on Information Technology- New Generations (ITNG), April 2025. [eprint<\/a>] [Best Student Paper Award]<\/strong><\/em><\/li>\n\n\n\n
        16. SK Monfared, K. Mitard, D. Forte<\/strong>, S. Tajik, \u201cMoving Target Defense to Mitigate Unattained Post-Silicon Side-Channel Leakage\u201d, GOMACTech, March 2025. [link<\/a>]<\/li>\n\n\n\n
        17. SK Monfared, D. Forte<\/strong>, S. Tajik, \u201cRandOhm: Mitigating Impedance Side-channel Attacks using  Randomized Circuit Configurations\u201d, International Conference on Computer-Aided Design (ICCAD), November 2024. [link<\/a>]<\/li>\n\n\n\n
        18. SK Monfared, K. Mitard, A. Cannon, D. Forte<\/strong>, S. Tajik, \u201cLaserEscape: Detecting and Mitigating Optical Probing Attacks\u201d,  International Conference on Computer-Aided Design (ICCAD), November 2024. [link<\/a>]<\/li>\n\n\n\n
        19. P. Ghosh, S. Shomaji, M. Zhu, D. Woodard, D. Forte<\/strong>, “Kin-Wolf: Kinship-established Wolfs in Indirect Synthetic Attack” IEEE International Joint Conference on Biometrics (IJCB), September 2024.<\/li>\n\n\n\n
        20. T. Farheen, S. Roy, A. Cannon, J. Di, S. Tajik, D. Forte<\/strong>, “Amnesiac Memory: A Self-Destructive Polymorphic Mechanism Against Cold Boot Data Remanence Attack”, GLSVLSI, June 2024. [link<\/a>]<\/li>\n\n\n\n
        21. T. Farheen, S. Roy, J. Di, S. Tajik, D. Forte<\/strong>, \u201cCalibratable Polymorphic Temperature Sensor for Detecting Side channel and Fault Injection Attacks”, IEEE International Symposium on Hardware Oriented Security and Trust (HOST), May 2024. [link<\/a>]<\/li>\n\n\n\n
        22. J. Wu, O. Dizon-Paradis, S. Rahman, D. Woodard,<\/span> D. Forte<\/span><\/strong>, \u201cDOSCrack: Deobfuscation using Oracle-guided Symbolic Execution and Clustering of Binary Security Keys\u201d,IEEE International Symposium on Hardware Oriented Security and Trust (HOST), May 2024.<\/span><\/li>\n\n\n\n
        23. H. Wang, M. Panoff, Z. Zhan, S. Wang, C. Bobda, D. Forte<\/strong>, \u201cProgrammable EM Sensor Array for Golden-Model Free Run-time Trojan Detection and Localization\u201d, Design, Automation and Test in Europe Conference (DATE), March 2024. [eprint<\/a>]<\/span><\/li>\n\n\n\n
        24. M. Hashemi, D. Forte<\/strong>, F. Ganji, “Time Is Money, Friend! Timing Side-channel Attack against Garbled Circuit Constructions”, Applied Cryptography and Network Security (ACNS), March 2024. [eprint<\/a>]<\/li>\n\n\n\n
        25. D. Koblah, D. Mehta, M. Hashemi, F. Ganji, D. Forte<\/strong>, “EDA Workflow for Optimization of Robust Model Probing-Compliant Masked Hardware Gadgets”, GOMACTech, March 2024.<\/li>\n\n\n\n
        26. D. Koblah, R. Acharya, D. Forte<\/strong>, “Genetic Algorithm for Functionally-Equivalent and Structurally-Divergent Benchmark Generation”, GOMACTech, March 2024.<\/li>\n\n\n\n
        27. A. Cannon, T. Farheen, S. Roy, S. Tajik, D. Forte<\/strong>, “Protection Against Physical Attacks Through Self-Destructive Polymorphic Latch”, International Conference on Computer-Aided Design (ICCAD), November 2023. [link<\/a>] <\/li>\n\n\n\n
        28. MM Rizvee, T. Hossain. T. Hoque, D. Forte<\/strong>, S. Shomaji, “A Persistent Hierarchical Bloom Filter-based Framework for Authentication and Tracking of ICs”, IEEE International Workshop On Silicon Lifecycle Management, October 2023. [link<\/a>]<\/li>\n\n\n\n
        29. R. Holzhausen, T. Farheen, M. Thomas, N. Maghari, D. Forte<\/strong>, “Laser Fault Injection Vulnerability Assessment and Mitigation with Case Study on PG-TVD Logic Cells”, International Test Conference (ITC), October 2023. [link<\/a>]<\/li>\n\n\n\n
        30. P. Ghosh, S. Shomaji, D. Woodard, D. Forte<\/strong>, “KinfaceNet: A New Deep Transfer Learning based Kinship Feature Extraction Framework”,  IEEE International Joint Conference on Biometrics (IJCB 2023), September 2023. <\/li>\n\n\n\n
        31. H. Wang, M. Panoff, S. Wang, D. Forte<\/strong>, “HT-EMIS: A Deep Learning Tool for Hardware Trojan Detection and Identification through Runtime EM Side-Channels”, Great Lakes Symposium on VLSI (GLSVLSI), June 2023. [link<\/a>]<\/li>\n\n\n\n
        32. M. Gao, D. Forte<\/strong>, “Detour: Layout-aware Reroute Attack Vulnerability Assessment and Analysis”, Hardware-Oriented Security and Trust (HOST), May 2023.<\/li>\n\n\n\n
        33. Y. Bai, J. Park, M. Tehrnaipoor, D. Forte<\/strong>, “Dual Channel EM\/Power Attack Using Mutual Information and its Real-time Implementation” Hardware-Oriented Security and Trust (HOST), May 2023.<\/li>\n\n\n\n
        34. S. Roy, S. Tajik, D. Forte<\/strong>, “Polymorphic Sensor to Detect Laser Logic State Imaging Attack” International Symposium on Quality Electronic Design (ISQED), April 2023. [link<\/a>]<\/li>\n\n\n\n
        35. T. Farheen, S. Tajik, D. Forte<\/strong>, “SPRED: Spatially Distributed Laser Fault Injection Resilient Design” International Symposium on Quality Electronic Design (ISQED), April 2023. [pdf<\/a>]<\/li>\n\n\n\n
        36. S. Roy, J. Chen, D. Forte<\/strong>, “Self-contained LDO Odometer to Detect Recycled Counterfeit AMS Chips”, in GOMACTech, March 2023.<\/li>\n\n\n\n
        37. J. Wu, F. Fowze, D. Forte<\/strong>, “EXERT: EXhaustive IntEgRiTy Analysis for Information Flow Security”, IEEE Asian Hardware-Oriented Security and Trust (AsianHOST), December 2022<\/li>\n\n\n\n
        38. F. Fowze, M. Choudhury, D. Forte<\/strong>, “EISec: Exhaustive Information Flow Security of Hardware Intellectual Property Utilizing Symbolic Execution”, IEEE Asian Hardware-Oriented Security and Trust (AsianHOST), December 2022.<\/li>\n\n\n\n
        39. M. Gao, D. Forte,<\/strong> “iPROBE-O: FIB-aware Place and Route for Probing Protection Using Orthogonal Shields” IEEE Asian Hardware-Oriented Security and Trust (AsianHOST), December 2022.<\/li>\n\n\n\n
        40. M. Hashemi, S. Roy, D. Forte<\/strong>, F. Ganji, “HWGN2<\/sup>: Side-channel Protected NNs through Secure and Private Function Evaluation” International Conference on Security, Privacy and Applied Cryptographic Engineering  (SPACE), December 2022. [link<\/a>]<\/li>\n\n\n\n
        41. D. Koblah, F. Ganji, D. Forte<\/strong>, S. Tajik, “Hardware Moving Target Defenses against Physical Attacks: Design Challenges and Opportunities”, ACM Workshop on Moving Target Defense (MTD), November 2022. [link<\/a>]<\/li>\n\n\n\n
        42. M. Hashemi, S. Roy, F, Ganji, D. Forte<\/strong>, “Garbled EDA: Privacy-Preserving Electronic Design Automation”, International Conference on Computer-Aided Design (ICCAD), November 2022. [preprint<\/a>]<\/li>\n\n\n\n
        43. M. Choudhury, M. Gao, S. Tajik, D. Forte,<\/strong> “TAMED: Transitional Approaches for LFI Resilient State Machine Encoding”, IEEE International Test Conference (ITC), September 2022.<\/li>\n\n\n\n
        44. S. Roy, M. Hashemi, F. Ganji, D. Forte<\/strong>, “Active IC Metering Protocol Security Revisited and Enhanced with Oblivious Transfer”, SRC TECHCON, September 2022.<\/li>\n\n\n\n
        45. RY Acharya, D. Forte<\/strong>, “Joint Optimization of NCL PUF Using Frequency-based Analysis and Evolutionary Algorithm”, International Symposium on Quality Electronic Design (ISQED), April 2022. [link<\/a>]<\/li>\n\n\n\n
        46. S. Roy, T. Farheen, S. Tajik, D. Forte<\/strong>, “Self-timed Sensors for Detecting Static Optical Side Channel Attacks”, International Symposium on Quality Electronic Design (ISQED), April 2022. [link<\/a>]<\/li>\n\n\n\n
        47. J. Schubeck, D. Koblah, U. Botero, D. Forte<\/strong>, “A Comprehensive Taxonomy of PCB Defects”, in GOMACTech, March 2022.<\/li>\n\n\n\n
        48. R. Wilson, H. Lu, M. Zhu, D. Forte<\/strong>, DL Woodard, “REFICS: A Step Towards Linking Vision with Hardware Assurance”, Winter Conference on Applications of Computer Vision (WACV), January 2022. [link<\/a>]<\/li>\n\n\n\n
        49. U. Botero, F. Ganji, D. Woodard, D Forte<\/strong>, “Automated Trace and Copper Plane Extraction of X-ray Tomography Imaged PCBs”, IEEE International Conference on Physical Assurance and Inspection of Electronics (PAINE), December 2021.<\/li>\n\n\n\n
        50. T. Farheen, U. Botero, N. Varshney, HT Shen, DL Woodard, M. Tehranipoor, D. Forte<\/strong>, “Proof of Reverse Engineering Barrier: SEM Image Analysis on Covert Gates”, International Symposium for Testing and Failure Analysis (ISTFA), November 2021. [link<\/a>]<\/li>\n\n\n\n
        51. M. Choudhury, S. Tajik, D. Forte<\/strong>, “SPARSE: Spatially Aware LFI Resilient State Machine Encoding”, Hardware and Architectural Support for Security and Privacy (HASP), October 2021. <\/li>\n\n\n\n
        52. RY Acharya, M. Levin, D. Forte<\/strong>, “LDO-based Odometer to Combat IC Recycling”, IEEE International System-on-Chip Conference (SOCC), September 2021. [link<\/a>]<\/li>\n\n\n\n
        53. RY Acharya, N. Charlot, MM Alam, F. Ganji, D. Gauthier, D. Forte<\/strong>, “Chaogate Parameter Optimization using Bayesian Optimization and Genetic Algorithm”,  International Symposium on Quality Electronic Design (ISQED’21), April 2021. [link<\/a>]<\/li>\n\n\n\n
        54. DS Koblah, UJ Botero, F. Ganji, D. Woodard, D. Forte<\/b>, “Via Modeling on X-Ray Images of Printed Circuit Boards Through Deep Learning”, in GOMACTech, March 2021. [link<\/a>]<\/li>\n\n\n\n
        55. J. Bellay, D. Forte<\/strong>, R. Martin, C. Taylor, “Hardware Vulnerability Description, Sharing and Reporting: Challenges and Opportunities”, in GOMACTech, March 2021. [link<\/a>]<\/li>\n\n\n\n
        56. M. Choudhury, S. Tajik, D. Forte<\/strong>, “PATRON: A Pragmatic Approach for Encoding LFI Resistant FSMs”, Design, Automation and Test in Europe (DATE), February 2021. [preprint<\/a>]<\/li>\n\n\n\n
        57. R. Acharya, S. Chowdhury, F Ganji, D. Forte<\/b>, “Attack of the Genes: Finding Keys and Parameters of Locked Analog ICs Using Genetic Algorithm” IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), December 2020. [preprint<\/b><\/a>]<\/strong><\/li>\n\n\n\n
        58. U. Botero, F. Ganji, N. Asadizanjani, D.Woodard, D. Forte<\/b>, “Semi-Supervised Automated Layer Identification of X-ray Tomography Imaged PCBs”, IEEE International Conference on Physical Assurance and Inspection of Electronics (PAINE), December 2020.<\/li>\n\n\n\n
        59. P. Ghosh, U. Botero, F. Ganji, D. Woodard, RS Chakraborty, D. Forte<\/b>, “Automated Detection and Localization of Counterfeit Chip Defects by Texture Analysis in Infrared (IR) Domain”, IEEE International Conference on Physical Assurance and Inspection of Electronics (PAINE), December 2020. [link<\/a>]<\/li>\n\n\n\n
        60. UJ Botero, D. Koblah, DE Capecci, F. Ganji, N. Asadi, DL Woodard, D. Forte,<\/strong> “Automated Via Detection for PCB Reverse Engineering”, International Symposium for Testing and Failure Analysis (ISTFA), December 2020. [EDFAS Virtual Workshop (ISTFA 2020) Outstanding Paper Award]<\/b><\/em><\/li>\n\n\n\n
        61. R. Wilson, D. Forte<\/strong>, N. Asadi, D. Woodard, “LASRE: A Novel Approach to Large area Accelerated Segmentation for Reverse Engineering on SEM images”, International Symposium for Testing and Failure Analysis (ISTFA), December 2020. [preprint<\/a>]<\/li>\n\n\n\n
        62. S. Chowdhury, R. Acharya, W. Boullion, M. Howard, A. Felder, J. Di, D. Forte<\/b>, “A Weak Asynchronous RESet (ARES) PUF Using Start-up Characteristics of Null Conventional Logic Gates”, IEEE International Test Conference (ITC), November 2020. [preprint<\/a>]<\/li>\n\n\n\n
        63. S. Amir, D. Forte<\/b>, “Adaptable and Divergent Synthetic Benchmark Generation for Hardware Security”, International Conference on Computer-Aided Design (ICCAD), November 2020. [link<\/a>]<\/li>\n\n\n\n
        64. S. Chowdhury, F Ganji, D. Forte<\/b>, “Low-Cost Remarked Counterfeit IC Detection Using LDO Regulators”, IEEE International Symposium on Circuits and Systems (ISCAS), October 2020. [link<\/a>]<\/li>\n\n\n\n
        65. A. Covic, F. Ganji, D. Forte<\/b>, “Circuit Masking Schemes: New Hope for Backside Probing Countermeasures?”, SRC TECHCON, September 2020. [link<\/a>]<\/li>\n\n\n\n
        66. M. Gao, H. Wang, M. Tehranipoor, D. Forte<\/b>, “iPROBE V2: Internal Shielding-based Countermeasures against Both Back-side and Front-side Probing Attacks”, SRC TECHCON, September 2020. [link<\/a>]<\/li>\n\n\n\n
        67. F Ganji, S. Amir, S. Tajik, D. Forte<\/b>, JP Seifert, “Pitfalls in Machine Learning-based Adversary Modeling for Hardware Systems”, Design, Automation, and Test in Europe (DATE), March 2020. [preprint<\/a>]<\/li>\n\n\n\n
        68. UJ Botero, N. Asadizanjani, D. Woodard, D. Forte<\/b>, “A Framework for Automated Alignment and Layer Identification of X-Ray Tomography Imaged PCBs”, in GOMACTech, March 2020. [link<\/a><\/strong>]<\/li>\n\n\n\n
        69. A. Covic, Q. Shi, H. Shen, D. Forte,<\/b> “Contact-to-Silicide Probing Attacks on Integrated Circuits and Countermeasures”, IEEE Asian Hardware-Oriented Security and Trust (AsianHOST), December 2019. [link<\/a>]<\/li>\n\n\n\n
        70. A. Alaql, D. Forte,<\/b> S.Bhunia, “Sweep to the Secret: A Constant Propagation Attack on Logic Locking”, IEEE Asian Hardware-Oriented Security and Trust (AsianHOST), December 2019. [link<\/a>]<\/li>\n\n\n\n
        71. S. Chowdhury, F. Ganji, T. Bryant, N. Maghari, D. Forte<\/b>, “Recycled Analog and Mixed Signal Chip Detection at Zero Cost Using LDO Degradation”, IEEE International Test Conference (ITC), November 2019. [link<\/a>]<\/li>\n\n\n\n
        72. R. Wilson, RY Acharya, D. Forte<\/b>, N. Asadizanjani, D. Woodard, “A Novel Approach to Unsupervised Automated Extraction of Standard Cell Library for Reverse Engineering and Hardware Assurance”, International Symposium for Testing and Failure Analysis (ISTFA), November 2019.<\/li>\n\n\n\n
        73. S. Shomaji, F. Ganji, D. Woodard, D. Forte<\/b>, “Hierarchical Bloom Filter Framework for Security, Space-efficiency, and Rapid Query Handling in Biometric Systems”, IEEE International Conference on Biometrics: Theory, Applications and Systems (BTAS), September 2019. [link<\/a>]<\/li>\n\n\n\n
        74. M. Alam, S. Tajik, F. Ganji, M. Tehranipoor, D. Forte<\/b>, “RAM-Jam: Remote Temperature and Voltage Fault Attack on FPGAs using Memory Collisions”, Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC), August 2019. [link<\/a>]<\/li>\n\n\n\n
        75. F. Ganji, S. Tajik, P. Stauss, JP Seifert, D. Forte<\/b>, M. Tehranipoor, “Approaches for Hardness Amplification of PUFs”, International Workshop on Security Proofs for Embedded Systems (PROOFS), August 2019. [preprint<\/a>]<\/li>\n\n\n\n
        76. R. Wilson, N. Asadizanjani, D. Forte<\/b>, D. Woodard, “First Auto-Magnifier Platform for Hardware Assurance and Reverse Engineering Integrated Circuits”, Microscopy & Microanalysis (M&M), August 2019. [link<\/b><\/a>]<\/li>\n\n\n\n
        77. P. Ghosh, F. Ganji, D. Forte<\/b>, D. Woodard, RS Chakraborty, “Automated Framework for Unsupervised Counterfeit Integrated Circuit Detection by Physical Inspection”, International Conference on Physical Assurance and Inspection of Electronics (PAINE), July 2019.<\/li>\n\n\n\n
        78. S. Chowdhury, H. Shen, B. Park, N. Maghari, D.Forte<\/b>, “Aging Analysis of Low Dropout Regulator for Universal Recycled IC Detection”, IEEE Computer Society Annual Symposium on VLSI (ISVLSI), July 2019.<\/li>\n\n\n\n
        79. A. Gorbenko, N. Noor, S. Muneer, R. Khan, F. Dirisaglik, A. Cywar, B. Shakya, D. Forte<\/b>, M. van Dijk, A. Gokirmak, H. Silva, “Resistance Drift and Crystallization in Suspended and On-Oxide Phase Change Memory Line Cells”, IEEE International Conference on Nanotechnology (IEEE-NANO), July 2019. [link<\/b><\/a>]<\/li>\n\n\n\n
        80. B. Park, M. Tehranipoor, D. Forte<\/b>, N. Maghari, “A Metal-Via Resistance Based Physically Unclonable Function with 1.18% Native Instability” IEEE Custom Integrated Circuits Conference (CICC), April 2019.<\/li>\n\n\n\n
        81. A. Alaql, T. Hoque, D. Forte<\/b>, S. Bhunia, “Quality Obfuscation for Reliable and Adaptive Hardware IP Protection”, IEEE VLSI Test Symposium (VTS), April 2019.<\/li>\n\n\n\n
        82. A. Stern, K. Yang, J. Vosatka, A. Duncan, J. Park, D. Forte<\/b>, M. Tehranipoor, “RASC: Enabling Remote Access to Side-Channels for Mission Critical Systems”, in GOMACTech, March 2019.<\/li>\n\n\n\n
        83. Q. Shi, H. Wang, N. Asadizanjani, M. Tehranipoor, D. Forte<\/b>, “A Comprehensive Analysis on Vulnerability of Active Shields to Tilted Microprobing Attacks”, IEEE Asian Hardware-Oriented Security and Trust (AsianHOST), December 2018.<\/li>\n\n\n\n
        84. A. Stern, U.J. Botero, B. Shakya, H. Shen, D. Forte<\/b>, M. Tehranipoor, “EMFORCED: EM-based Fingerprinting Framework for Counterfeit Detection with Demonstration on Remarked ICs”, IEEE International Test Conference (ITC), October 2018. [link<\/a>]<\/li>\n\n\n\n
        85. H. Shen, N. Asadizanjani, M. Tehranipoor, D. Forte,<\/b> “Nanopyramid: An Optical Scrambler Against Backside Probing Attacks”, International Symposium for Testing and Failure Analysis (ISTFA), October 2018.<\/li>\n\n\n\n
        86. P. Ghosh, D. Forte<\/b>, D. Woodard, R.S. Chakraborty, “Automated Detection of Pin Defects on Counterfeit Microelectronics”, International Symposium for Testing and Failure Analysis (ISTFA), October 2018.<\/li>\n\n\n\n
        87. H. Wang, Q. Shi, N. Asadizanjani, D. Forte<\/b>, M. Tehranipoor, “A Physical Design Flow against Front-side Probing Attacks by Internal Shielding”, SRC TECHCON, September 2018.<\/li>\n\n\n\n
        88. J. Park, X. Xu, Y. Jin, D. Forte<\/b>, M. Tehranipoor, “Power-based Side-Channel Instruction-level Disassembler”, Design Automation Conference (DAC), June 2018. [link<\/b><\/a>]<\/li>\n\n\n\n
        89. E.L. Principe, N. Asadizanjani, D. Forte, <\/b>M. Tehranipoor, M. DiBattista, R. Chivas, S. Silverman, N. Piche, M. Marsh, J. Mastovich, “Steps Toward Computational Guided Deprocessing of Integrated Circuits” in GOMACTech, March 2018.<\/li>\n\n\n\n
        90. D. Capecci, G. Contreras, D. Forte<\/b>, M.Tehranipoor, S. Bhunia, “Automated SoC Security from Design to Fabrication” in GOMACTech, March 2018.<\/li>\n\n\n\n
        91. S. Baireddy, U.J. Botero, N. Asadizanjani, M.Tehranipoor, D. Woodard, D. Forte<\/b>, “Automated Detection of Counterfeit IC Defects Using Image Processing” in GOMACTech, March 2018.<\/li>\n\n\n\n
        92. U.J. Botero, M.Tehranipoor, D. Forte<\/b>, “Downgrade: A Framework for Obsolescence Handling through Backwards Compatibility” in GOMACTech, March 2018.<\/li>\n\n\n\n
        93. S. Chowdhury, X. Xu, M. Tehranipoor, D. Forte<\/b>, “Aging Resistant RO PUF with Increased Reliability in FPGA”,  International Conference on Reconfigurable Computing and FPGAs (ReConFig), December 2017.<\/li>\n\n\n\n
        94. E.L. Principe, N.Asadizanjani, D. Forte<\/b>, M. Tehranipoor, R. Chivas, M. DiBattista, S.Silverman, M. Marsh, N. Piche, J. Mastovich, “Steps Toward Automated Deprocessing of Integrated Circuits,”  International Symposium for Testing and Failure Analysis (ISTFA), November 2017. [ISTFA 2017 Outstanding Paper Award] <\/b><\/em><\/li>\n\n\n\n
        95. A. Chhotaray, A. Nahiyan, T. Shrimpton, D. Forte<\/b>, M. Tehranipoor, “Standardizing Bad Cryptographic Practice – A Teardown of the IEEE Standard for Protecting Electronic-Design Intellectual Property,” ACM Conference on Computer and Communications Security (CCS), November 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
        96. A. Nahiyan, M. Sadi, R. Vittal, G. Contreras, D. Forte,<\/b> M.Tehranipoor, “Hardware Trojan Detection through Information Flow Security Verification,” IEEE International Test Conference (ITC), November 2017.<\/li>\n\n\n\n
        97. Z. Guo, X. Xu, M. Tehranipoor, D. Forte<\/b>, “MPA: Model-assisted PCB Attestation via Board-level RO and Temperature Compensation”, IEEE Asian Hardware-Oriented Security and Trust (AsianHOST), October 2017.<\/li>\n\n\n\n
        98. K. Yang, U.J. Botero, H. Shen, D. Forte<\/b>, M. Tehranipoor, “A Split Manufacturing Approach for Unclonable Chipless RFIDs for Pharmaceutical Supply Chain Security”, IEEE Asian Hardware-Oriented Security and Trust (AsianHOST), October 2017.<\/li>\n\n\n\n
        99. N. Karimian, D. Woodard, D. Forte<\/b>, “On the Vulnerability of ECG Verification to Online Presentation Attacks”, International Joint Conference on Biometrics (IJCB), October 2017. [IJCB 2017 Best Student Paper Award] <\/b><\/em><\/li>\n\n\n\n
        100. X. Xu, B. Shakya, M. Tehranipoor, D. Forte<\/b>, “Novel Bypass Attack and BDD-based Tradeoff Analysis Against all Known Logic Locking Attacks,” International Conference on Cryptographic Hardware and Embedded Systems (CHES), September 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
        101. Z. Guo, M. Tehranipoor, D. Forte<\/b>,”Memory-based Counterfeit IC Detection Framework”, SRC TECHCON, September 2017.<\/li>\n\n\n\n
        102. Z. Guo, X. Xu, M. Tehranipoor, D. Forte<\/b>, “FFD: A Framework for Fake Flash Detection”, Design Automation Conference (DAC), June 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
        103. Q. Shi, K. Xiao, D. Forte<\/b>, M. Tehranipoor, “Securing Split Manufactured ICs with Wire Lifting Obfuscated Built-In Self-Authentication”, GLSVLSI, May 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
        104. S. Amir, B. Shakya, D. Forte<\/b>, M. Tehranipoor, S. Bhunia, “Comparative Analysis of Hardware Obfuscation for IP Protection”, GLSVLSI, May 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
        105. T. Byrant, S. Chowdhury, D. Forte<\/b>, M. Tehranipoor, N. Maghari, “A Stochastic All-Digital Weak Physically Unclonable Function for Analog\/Mixed-Signal Applications”, IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), May 2017.<\/li>\n\n\n\n
        106. N. Karimian, F. Tehranipoor, Z. Guo, M. Tehranipoor, D. Forte<\/b>, “Noise Assessment Framework for Optimizing ECG Key Generation”, IEEE International Conference on Technologies for Homeland Security (HST), April 2017.<\/li>\n\n\n\n
        107. Q. Shi, N. Asadizanjani, D. Forte<\/b>, M.Tehranipoor, “Layout-based Microprobing Vulnerability Assessment for Security Critical Applications,” in GOMACTech, March 2017.<\/li>\n\n\n\n
        108. N. Karimian, Z. Guo, M. Tehranipoor, D. Forte<\/b>, “Human Recognition from Photoplethysmography (PPG) Based on Non-fiducial Features”, IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), March 2017.<\/li>\n\n\n\n
        109. N. Karimian, M. Tehranipoor, D. Forte<\/b>, “Non-Fiducial PPG-based Authentication for Healthcare Application”, International Conference on Biomedical and Health Informatics (BHI), February 2017.<\/li>\n\n\n\n
        110. G. K. Contreras, A. Nahiyan, S. Bhunia, D. Forte<\/b>, M. Tehranipoor, “Security Vulnerability Analysis of Design-for-Test Exploits for Asset Protection in SoCs,” Asia and South Pacific Design Automation Conference (ASP-DAC), January 2017. [link<\/b><\/a>]<\/li>\n\n\n\n
        111. Z. Guo, M. Tehranipoor, D. Forte<\/b>, “Aging Attacks for Key Extraction on Permutation-Based Obfuscation,” IEEE Asian Hardware-Oriented Security and Trust (AsianHOST), December 2016.<\/li>\n\n\n\n
        112. T. Rahman, D. Forte<\/b>, X. Wang, M. Tehranipoor, “Enhancing Noise Sensitivity of Embedded SRAMs for Robust True Random Number Generation in SoCs,” IEEE Asian Hardware-Oriented Security and Trust (AsianHOST), December 2016.<\/li>\n\n\n\n
        113. M. M. Alam, M. Tehranipoor, D. Forte<\/b>, “Recycled FPGA Detection Using Exclusive LUT Path Delay Characterization,” IEEE International Test Conference (ITC), November 2016.<\/li>\n\n\n\n
        114. B. Shakya, N. Asadizanjani, D. Forte<\/b>, M. Tehranipoor, “Chip Editor: Leveraging Circuit Edit for Logic Obfuscation and Trusted Fabrication,” IEEE\/ACM International Conference on Computer-Aided Design (ICCAD), November 2016. [link<\/b><\/a>]<\/li>\n\n\n\n
        115. Z. Guo, B. Shakya, H. Shen, S. Bhunia, N. Asadizanjani, D. Forte<\/b>, M. Tehranipoor, “A New Methodology to Protect PCBs from Non-destructive Reverse Engineering,” International Symposium for Testing and Failure Analysis (ISTFA), November 2016.<\/li>\n\n\n\n
        116. N. Asadizanjani, D. Forte<\/b>, M. Tehranipoor, “Non-destructive Bond Pull and Ball Shear Failure Analysis Based on Real Structural Properties,” International Symposium for Testing and Failure Analysis (ISTFA), November 2016.<\/li>\n\n\n\n
        117. N. Asadizanjani, S. Gattigowda, N. Dunn, M. Tehranipoor, D. Forte<\/b>, “A Database for Counterfeit Electronics and Automatic Defect Detection Based on Image Processing and Machine Learning,” International Symposium for Testing and Failure Analysis (ISTFA), November 2016. <\/li>\n\n\n\n
        118. T. Bryant, S. Chowdhury, D. Forte<\/b>, M. Tehranipoor, N. Maghari, “A Stochastic Approach to Analog Physical Unclonable Function,” IEEE Midwest Symposium on Circuits and Systems (MWSCAS), October 2016. <\/li>\n\n\n\n
        119. M. T. Rahman, D. Forte<\/b>, and M. Tehranipoor, “SRAM Inspired Design and Optimization for Developing Robust Security Primitives,” in SRC TECHCON, September 2016. [Awarded Best in Session]<\/b><\/em><\/li>\n\n\n\n
        120. N. Karimian, M. Tehranipoor, D. Woodard, D. Forte<\/b>, “Biometrics for Authentication in Resource-Constrained Systems,” International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), August 2016. [link<\/a><\/strong>]<\/li>\n\n\n\n
        121. H. Shen, F. Rahman, B. Shakya, M. Tehranipoor, D. Forte<\/b>, “Selective Enhancement of Randomness at the Materials Level: Poly-Si Based Physical Unclonable Functions (PUFs)”, IEEE Computer Society Annual Symposium on VLSI (ISVLSI), July 2016.<\/li>\n\n\n\n
        122. A. Nahiyan, K. Xiao, K. Yang, Y. Jin, D. Forte<\/b>, M. Tehranipoor, “AVFSM: A Framework for Identifying and Mitigating Vulnerabilities in FSMs”, Design Automation Conference (DAC), June 2016. [link<\/b><\/a>]<\/li>\n\n\n\n
        123. Z. Guo, N. Karimian, M. Tehranipoor, D. Forte<\/b>, “Hardware Security Meets Biometrics for the Age of IoT”, IEEE International Symposium on Circuits and Systems (ISCAS), May 2016.<\/li>\n\n\n\n
        124. T. Le, J. Di, M. Tehranipoor, D. Forte,<\/b> L. Wang, “Tracking Data Flow at Gate-Level through Structural Checking”, GLSVLSI, May 2016. [link<\/b><\/a>]<\/li>\n\n\n\n
        125. Q. Shi, N. Asadizanjani, D. Forte<\/b>, M.Tehranipoor, “A Layout-driven Framework to Assess Vulnerability of ICs to Microprobing Attacks”, IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), May 2016. [HOST 2016 Best Paper Award] <\/span><\/b><\/em><\/li>\n\n\n\n
        126. Z. Guo, M. T. Rahman, M. Tehranipoor, D. Forte<\/b>, “A Zero-cost Approach to Detect Recycled SoCs Using Embedded SRAM”, IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), May 2016.<\/li>\n\n\n\n
        127. K.Yang, D. Forte<\/b>, M. Tehranipoor, “UCR: Unclonable Chipless RFID Tag”, IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), May 2016. [HOST 2016 Best Paper Nomination] <\/span><\/b><\/em><\/li>\n\n\n\n
        128. F. Rahman, D. Forte,<\/b> and Mark Tehranipoor, “Reliability vs. Security: Challenges and Opportunities for Developing Reliable and Secure Integrated Circuits,” International Reliability Physics Symposium (IRPS), April 2016 (Invited Paper).<\/i><\/b><\/li>\n\n\n\n
        129. M. M. Alam, N. Asadizanjani, M.Tehranipoor, D. Forte<\/b>, “The Impact of X-ray Tomography on the Reliability of FPGAs” in GOMACTech, March 2016.<\/li>\n\n\n\n
        130. Z. Guo, N. Karimian, M. Tehranipoor, D. Forte,<\/b> “Biometric Based Human-to-Device (H2D) Authentication”, in GOMACTech, March 2016.<\/li>\n\n\n\n
        131. N. Asadizanjani, S. Shahbazmohamadi, D. Forte<\/b>, M. Tehranipoor, “Nondestructive X-ray Tomography Based Bond Pull and Ball Shear Analysis” in GOMACTech, March 2016.<\/li>\n\n\n\n
        132. B. Shakya, F. Rahman, M. Tehranipoor, D. Forte,<\/b> “Harnessing Nanoscale Device Properties for Hardware Security”,  Microprocessor Test and Verification (MTV), December 2015.<\/li>\n\n\n\n
        133. K. Yang, D. Forte<\/b>, M. Tehranipoor, “Protecting Endpoint Devices in IoT Supply Chain”,  IEEE\/ACM International Conference on Computer-Aided Design (ICCAD), November 2015. [link<\/b><\/a>]<\/li>\n\n\n\n
        134. H. Dogan, M. Alam, N. Asadizanjani, S. Shahbazmohamadi, D. Forte<\/b>,  M. Tehranipoor, “Analyzing the Impact of X-ray Tomography for Non-destructive Counterfeit Detection”, International Symposium for Testing and Failure Analysis (ISTFA), November 2015.<\/li>\n\n\n\n
        135. N. Asadizanjani, S. Shahbazmohamadi, M. Tehranipoor, D. Forte<\/b>, “Non-destructive PCB Reverse Engineering Using X-ray Micro Computed Tomography”, International Symposium for Testing and Failure Analysis (ISTFA), November 2015.<\/li>\n\n\n\n
        136. B. Shakya, U. Guin, M. Tehranipoor, D. Forte<\/b>, “Performance Optimization for On-Chip Sensors to Detect Recycled ICs,” IEEE International Conference on Computer Design (ICCD), October 2015.<\/li>\n\n\n\n
        137. M. T. Rahman, D. Forte<\/b>, F. Rahman, M. Tehranipoor, “A Pair Selection Algorithm for Robust RO-PUF Against Environmental Variations and Aging,” IEEE International Conference on Computer Design (ICCD), October 2015.<\/li>\n\n\n\n
        138. S. Chen, J. Chen, D. Forte<\/b>, J. Di, M. Tehranipoor, L. Wang, “Chip-level Anti-reverse Engineering using Transformable Interconnects,” IEEE Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), October 2015.<\/li>\n\n\n\n
        139. M. T. Rahman, D. Forte<\/b>, and M. Tehranipoor, “Robust SRAM-PUF: Cell Stability Analysis and Novel Bit-Selection Algorithm,” SRC TECHCON, September 2015.<\/li>\n\n\n\n
        140. K. Yang, D.Forte<\/b>, M.Tehranipoor, “ReSC: RFID-enabled Supply Chain Management and Traceability for Network Devices,” in 11th Work\u00adshop on RFID Se\u00adcu\u00adri\u00adty (RFIDSec 2015), June 2015.<\/li>\n\n\n\n
        141. Z. Guo, J. Di, M. Tehranipoor, D. Forte<\/b>, “Investigation of Obfuscation-based Anti-Reverse Engineering for Printed Circuit Boards,” Design Automation Conference (DAC) 2015, June 2015. [link<\/b><\/a>]<\/li>\n\n\n\n
        142. K. Xiao, D. Forte,<\/b> M. Tehranipoor, “Efficient and Secure Split Manufacturing via Obfuscated Built-In Self-Authentication,” IEEE International Symposium on Hardware-Oriented Security and Trust (HOST) 2015, May 2015. [HOST 2015 Best Paper Award] <\/span><\/b><\/em><\/li>\n\n\n\n
        143. N. Karimian, F. Tehranipoor, M.T. Rahman, S. Kelly, D. Forte<\/b>, “Genetic Algorithm for Hardware Trojan Detection with Ring Oscillator Network (RON),” IEEE International Conference on Technologies for Homeland Security (HST), April 2015.<\/li>\n\n\n\n
        144. K. Yang, D. Forte<\/b>, M. Tehranipoor, “An RFID-based Technology for Electronic Component and System Counterfeit Detection and Traceability,” IEEE International Conference on Technologies for Homeland Security (HST), April 2015.<\/li>\n\n\n\n
        145. M.T. Rahman, A. Hosey, F. Rahman, D. Forte<\/b>, M. Tehranipoor, “RePa: A Pair Selection Algorithm for Reliable Keys from RO-based PUF” GOMACTech, March 2015.<\/li>\n\n\n\n
        146. H. Dogan, D. Forte<\/b>, M. Tehranipoor, “Aging Analysis for Recycled FPGA Detection” GOMACTech, March 2015.<\/li>\n\n\n\n
        147. N. Asadizanjani, S. E. Quadir, S. Shahbazmohamadi, M. Tehranipoor, D. Forte<\/b>, “Rapid Non-destructive Reverse Engineering of Printed Circuit Boards by High Resolution X-ray Tomography” GOMACTech, March 2015.<\/li>\n\n\n\n
        148. A. Hosey, M.T. Rahman, K. Xiao, D. Forte<\/b>, M. Tehranipoor, “Advanced Analysis of Cell Stability for Reliable SRAM PUF,” IEEE Asian Test Symposium (ATS), November 2014.<\/li>\n\n\n\n
        149. S. Shahbazmohamadi, D. Forte<\/b>, M. Tehranipoor, “Advanced Physical Inspection Methods for Counterfeit Detection”, International Symposium for Testing and Failure Analysis (ISTFA), November 2014.<\/li>\n\n\n\n
        150. M.T. Rahman, D. Forte<\/b>, Q. Shi, G. Contreras, M. Tehranipoor, “CSST: Preventing Distribution of Unlicensed and Rejected ICs by Untrusted Foundry and Assembly,” IEEE Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), October 2014.<\/li>\n\n\n\n
        151. H. Dogan, D. Forte<\/b>, M. Tehranipoor, “Aging Analysis for Recycled FPGA Detection,” IEEE Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), October 2014.<\/li>\n\n\n\n
        152. U. Guin, D. Forte<\/b>, X. Zhang, M. Tehranipoor, “Low-cost On-Chip Structures for Combating Die and IC Recycling,” Design Automation Conference (DAC), June 2014 [link<\/b><\/a>]<\/li>\n\n\n\n
        153. M.T. Rahman, K. Xiao, D. Forte<\/b>, X. Zhang, Z. Shi, M. Tehranipoor, “TI-TRNG: Technology Independent True Random Number Generator,” Design Automation Conference (DAC), June 2014 [link<\/b><\/a>]<\/li>\n\n\n\n
        154. M.T. Rahman, D. Forte<\/b>, Q. Shi, G. Contreras, M. Tehranipoor, “CSST: An Efficient Secure Split-Test for Preventing IC Piracy,” IEEE North Atlantic Test Workshop (NATW), May 2014 [link<\/b><\/a>]<\/li>\n\n\n\n
        155. K. Xiao, M.T. Rahman, D. Forte<\/b>, M. Su, Y. Huang, M.Tehranipoor, “Bit Selection Algorithm Suitable for High-Volume Production of SRAM-PUF,” in IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), May 2014.<\/li>\n\n\n\n
        156. U. Guin, D. Forte<\/b>, M. Tehranipoor, “Low-cost On-Chip Structures for Combatting Die and IC Recycling,” in GOMACTech, April 2014.<\/li>\n\n\n\n
        157. K. Xiao, M.T. Rahman, D. Forte<\/b>, M.Tehranipoor, “Low-cost Analysis for Identification of Mass-Produced Electronic Devices,” in GOMACTech, April 2014.<\/li>\n\n\n\n
        158. U. Guin, D. Forte<\/b>, D. DiMase, M. Tehranipoor, “Counterfeit IC Detection: Test Method Selection Considering Test Time, Cost, and Tier Level Risks,” in GOMACTech, April 2014.<\/li>\n\n\n\n
        159. C. Bao, D. Forte<\/b>, A. Srivastava, “On Application of One-class SVM to Reverse Engineering-Based Hardware Trojan Detection”, International Symposium on Quality Electronic Design (ISQED), March 2014.<\/li>\n\n\n\n
        160. M.T. Rahman, D. Forte<\/b>, J. Fahrny, M. Tehranipoor, “ARO-PUF: An Aging-Resistant Ring Oscillator PUF Design,” Design, Automation, & Test in Europe (DATE), March 2014. [link<\/a>]<\/li>\n\n\n\n
        161. U. Guin, D. Forte<\/b>, M. Tehranipoor, “Anti-Counterfeit Techniques: From Design to Resign”, Microprocessor Test and Verification (MTV), December 2013.<\/li>\n\n\n\n
        162. D. Forte<\/b>, C. Bao, A. Srivastava, “Temperature Tracking: An Innovative Run-Time Approach for Hardware Trojan Detection”, IEEE\/ACM International Conference on Computer-Aided Design (ICCAD), November 2013.<\/li>\n\n\n\n
        163. D. Forte<\/b>, A. Srivastava, “Manipulating Manufacturing Variations for Better Silicon-Based Physically Unclonable Functions”, IEEE Computer Society Annual Symposium on VLSI (ISVLSI), August  2012. [link<\/b><\/a>]<\/li>\n\n\n\n
        164. D. Forte<\/b>, A. Srivastava, “On Improving the Uniqueness of Silicon-Based Physically Unclonable Functions Via Optical Proximity Correction”, Design Automation Conference (DAC), June 2012. [DAC 2012 Best Paper Nomination]<\/em> <\/b>[link<\/b><\/a>]<\/li>\n\n\n\n
        165. D. Forte<\/b>, A. Srivastava, “Energy-Aware and Quality-Scalable Data Placement and Retrieval for Disks in Video Server Environments”, IEEE International Conference on Computer Design (ICCD), October 2011. [link<\/b><\/a>]<\/li>\n\n\n\n
        166. D. Forte<\/b>, A. Srivastava, “Adaptable Architectures for Distributed Visual Target Tracking”, IEEE International Conference on Computer Design (ICCD) , October 2011. [link<\/b><\/a>]<\/li>\n\n\n\n
        167. D. Forte<\/b>, A. Srivastava, “Energy-Aware Video Storage and Retrieval in Server Environments”, International Green Computing Conference and Workshops (IGCC), July 2011. [link<\/b><\/a>]<\/li>\n\n\n\n
        168. D. Forte<\/b>, A. Srivastava, “Resource-Aware Architectures for Particle Filter Based Visual Target Tracking”, International Green Computing Conference and Workshops (IGCC), July 2011. [link<\/b><\/a>]<\/li>\n\n\n\n
        169. D. Forte<\/b>, A. Srivastava, “Adaptable Video Compression and Transmission using Lossy and Workload Balancing Techniques”, NASA\/ESA Conference on Adaptive Hardware and Systems (AHS), June 2011 [Awarded AHS-2011 Best Student Paper] <\/b><\/em>[link<\/b><\/a>]<\/li>\n\n\n\n
        170. D. Forte<\/b>, A. Srivastava, “Energy-Aware Video Coding of Multiple Views via Workload Balancing”, NASA\/ESA Conference on Adaptive Hardware and Systems (AHS), June 2011. [link<\/b><\/a>]<\/li>\n\n\n\n
        171. D. Forte<\/b>, A.Srivastava, “Energy and Thermal-Aware Video Coding via Encoder\/Decoder Workload Balancing”, International Symposium on Low Power Electronics and Design (ISLPED), August 2010. [link<\/b><\/a>]<\/li>\n\n\n\n
        172. D. Forte<\/b>, A. Srivastava, “Thermal-Aware Sensor Scheduling for Distributed Estimation”, International Conference on Distributed Computing in Sensor Systems (DCOSS), June 2010. [link<\/b><\/a>]<\/li>\n<\/ol>\n\n\n\n

          Patents<\/h2>\n\n\n\n
            \n
          1. S. Chowdhury, D. Forte<\/strong>, M. Levin, N. Maghari. “LDO-Based Odometer To Combat IC Recycling”, issued on July 2, 2024<\/li>\n\n\n\n
          2. D. Forte<\/strong>, D. Woodard, F. Ganji, S. Shomaji. “Biometric Locking Methods and Systems for Internet of Things and the Connected Person”, issued on May 21, 2024.<\/li>\n\n\n\n
          3. D.Woodard, D. Forte<\/strong>, N. Asadizanjani, R. Wilson. “Accelerated Segmentation for Reverse Engineering of Integrated Circuits”, issued on February 6, 2024.<\/li>\n\n\n\n
          4. F. Ganji, S. Tajik, JP Seifert, D. Forte<\/strong>, M. Tehranipoor, “Hardness Amplification of Physical Unclonable Functions (PUFs)”, issued on October 24, 2023.<\/li>\n\n\n\n
          5. D. Woodard, N. Asadizanjani, D. Forte<\/strong>, R. Wilson. “Automatic Sharpness Adjustment for Imaging Modalities”, issued on October 2, 2023.<\/li>\n\n\n\n
          6. S. Chowdhury, F. Ganji, N. Maghari, D. Forte<\/strong>, “Detection Of Recycled Integrated Circuits And System-On-Chips Based On Degradation Of Power Supply Rejection Ratio”, issued on May 23, 2023.<\/li>\n\n\n\n
          7. M. Tehranipoor, U. Guin, D. Forte<\/b>, “A Comprehensive Framework for Protecting Intellectual Property in Semiconductor Industry”, issued on March 21, 2023.<\/li>\n\n\n\n
          8. H. Shen, N. Asadizanjani, D. Forte<\/strong>, M. Tehranipoor, “Optical Scrambler With Nano-Pyramids”, issued on November 22, 2022.<\/li>\n\n\n\n
          9. M. Tehranipoor, A. Nahiyan, J. Park, D. Forte,<\/strong> “CAD Framework for Power Side-channel Vulnerability Assessment”, issued on October 18, 2022.<\/li>\n\n\n\n
          10. M. Tehranipoor, A. Nahiyan, D. Forte<\/b>, “Hardware Trojan Detection Through Information Flow Security Verification”, issued on March 8, 2022.<\/li>\n\n\n\n
          11. D. Woodard, R. Wilson, N. Asadizanjani, D. Forte<\/strong>. “Histogram-based Auto Segmentation: A Novel Approach to Segmenting Integrated Circuit Structures from SEM Images”, issued on March 8, 2022.<\/li>\n\n\n\n
          12. M. Tehranipoor, D. Forte<\/strong>, F. Farahmandi, A. Nahiyan, F. Rahman, MS Rahman, “Protecting Obfuscated Circuits Against Attacks That Utilize Test Infrastructures”, issued on January 11, 2022.<\/li>\n\n\n\n
          13. D. Woodard, R. Wilson, N. Asadizanjani, D. Forte<\/strong>, “Method and Apparatus for Automatic Extraction of Standard Cells to Generate a Standard Cell Candidate Library”, issued on October 26, 2021.<\/li>\n\n\n\n
          14. M. Tehranipoor, H. Wang, Q. Shi, H. Shen, D. Forte<\/strong>. “Prevention of Front-side Probing Attacks”, issued on August 10, 2021.<\/li>\n\n\n\n
          15. B. Shakya, H. Shen, M. Tehranipoor, D. Forte<\/strong>, “Covert Gates To Protect Gate-Level Semiconductors”, issued on July 6, 2021.<\/li>\n\n\n\n
          16. M. Tehranipoor, D. Forte<\/b>, B. Shakya, and  N. Asadizanjani, “Circuit Edit and Obfuscation for Trusted Chip Fabrication”, issued onJune 8, 2021.<\/li>\n\n\n\n
          17. M. Tehranipoor, K. Yang, H. Shen, U. Botero, D. Forte<\/b>, “Cross-Registration For Unclonable Chipless RFID Tags”, issued on February 23, 2021.<\/li>\n\n\n\n
          18. M. Tehranipoor, D. Forte<\/b>, N. Asadizanjani, Q. Shi, “Layout-Driven Method to Assess Vulnerability of ICs To Microprobing Attacks”, issued on February 25, 2020.<\/li>\n\n\n\n
          19. S. Bhunia, H. Shen, M. Tehranipoor, D. Forte<\/b>, N. Asadizanjani, “Vanishing via for hardware IP protection from reverse engineering” issued on May 7, 2019.<\/li>\n\n\n\n
          20. M. Tehranipoor, K. Yang, H. Shen, D. Forte<\/b>, “Unclonable Environmentally-sensitive Chipless RFID Tag with a Plurality of Slot Resonators”, issued on January 15, 2019.<\/li>\n<\/ol>\n\n\n\n

            Editorials<\/h2>\n\n\n\n
              \n
            1. D. Forte<\/strong>, D. Mukhopadhyay, I.Polian, Y. Fe, R.Cammarota, “Introduction to the Special Issue on Emerging Challenges and Solutions in Hardware Security”, ACM Journal on Emerging Technologies in Computing Systems, Vol. 17, No. 3,  July 2021. [link<\/strong><\/a>]<\/li>\n\n\n\n
            2. D. Forte<\/b>, Y. Iskander,  “Guest editorial: Hardware Reverse Engineering and Obfuscation”, Journal of Hardware and Systems Security (HaSS), Vol. 2, No. 4 [link<\/b><\/a>]<\/li>\n\n\n\n
            3. D. Forte<\/b>, R. Perez, Y. Kim, S. Bhunia,  “Guest editors’ introduction: Supply-Chain Security for Cyberinfrastructure”, IEEE Computer, Vol. 49, No. 8, August 2016. [link<\/b><\/a>]<\/li>\n<\/ol>\n\n\n\n

              Other<\/h2>\n\n\n\n
                \n
              1. B. Lampe, W. Lyons, S. Zonouz, WA Conklin, C. O’Brien, A. Chhotaray, D. Cole, D. Saebeler, K, Castillo, S. McFly, SM Loo, GM Medina, E. Huang, D. Forte<\/strong>, M Ahmed, “CIE Curriculum Guide (V.2.0)”, May 2025. [link<\/strong><\/a>]<\/li>\n\n\n\n
              2. J. Bellay, D.Forte<\/b>, Bob Martin, J. Boyens, “Chapter 1: Hardware Assurance and Weakness Collaboration and Sharing (HAWCS)”, Trusted and Assured MicroElectronics Working Groups Report, December 2019. [link<\/b><\/a>]<\/li>\n\n\n\n
              3. D. Forte, <\/b>S. Bhunia, R. Karri, J. Plusquellic, M. Tehranipoor, <\/b>“IEEE International Symposium on Hardware Oriented Security and Trust (HOST): Past, Present, and Future”, IEEE International Test Conference (ITC), November 2019. [link<\/b><\/a>]<\/li>\n<\/ol>\n\n\n\n

                Dissertation<\/h2>\n\n\n\n
                  \n
                1. D. Forte<\/b>, “Design, Fabrication, and Run-time Strategies for Hardware-Assisted Security”, Ph.D. dissertation, Dept. of Electrical and Computer Engineering, University of Maryland, May 2013. [link<\/b><\/a>]<\/li>\n<\/ol>\n","protected":false},"excerpt":{"rendered":"

                  NOTE: This directory contains pdf\/ps files of articles that may be covered by copyright. You may browse the articles at your convenience, in the same spirit as you may read a journal or a proceedings article in a public library. Retrieving, copying, or distributing these files may violate copyright protection laws. Books Book Chapters Journal […]<\/p>\n","protected":false},"author":1381,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"page-templates\/page-section-nav.php","meta":{"_acf_changed":false,"inline_featured_image":false,"featured_post":"","footnotes":"","_links_to":"","_links_to_target":""},"class_list":["post-217","page","type-page","status-publish","hentry"],"acf":[],"_links":{"self":[{"href":"https:\/\/faculty.eng.ufl.edu\/dforte\/wp-json\/wp\/v2\/pages\/217","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/faculty.eng.ufl.edu\/dforte\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/faculty.eng.ufl.edu\/dforte\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/faculty.eng.ufl.edu\/dforte\/wp-json\/wp\/v2\/users\/1381"}],"replies":[{"embeddable":true,"href":"https:\/\/faculty.eng.ufl.edu\/dforte\/wp-json\/wp\/v2\/comments?post=217"}],"version-history":[{"count":20,"href":"https:\/\/faculty.eng.ufl.edu\/dforte\/wp-json\/wp\/v2\/pages\/217\/revisions"}],"predecessor-version":[{"id":3323,"href":"https:\/\/faculty.eng.ufl.edu\/dforte\/wp-json\/wp\/v2\/pages\/217\/revisions\/3323"}],"wp:attachment":[{"href":"https:\/\/faculty.eng.ufl.edu\/dforte\/wp-json\/wp\/v2\/media?parent=217"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}