{"id":47,"date":"2022-06-10T13:43:02","date_gmt":"2022-06-10T13:43:02","guid":{"rendered":"https:\/\/chatterjee.ece.ufl.edu\/?page_id=47"},"modified":"2026-03-31T19:26:23","modified_gmt":"2026-04-01T00:26:23","slug":"experience","status":"publish","type":"page","link":"https:\/\/faculty.eng.ufl.edu\/chatterjee\/members\/experience\/","title":{"rendered":"PI: Experience"},"content":{"rendered":"\n<hr class=\"wp-block-separator has-alpha-channel-opacity is-style-wide\" \/>\n\n\n\n<h6 class=\"wp-block-heading\">&#8212; ASSISTANT PROFESSOR (NELMS RISING STAR ENDOWED PROFESSOR)<\/h6>\n\n\n\n<h6 class=\"wp-block-heading\">ECE, <a href=\"https:\/\/www.ufl.edu\/\" target=\"_blank\" rel=\"noopener\">UNIVERSITY OF FLORIDA<\/a>, GAINESVILLE, FL, USA (Aug, 2022 &#8211; Present)<\/h6>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>Research Area and Interests:<\/strong> Energy-Efficient and secure analog\/RF\/mixed-signal circuits and systems for biomedical and IoT applications; time-domain sensing and sensor interfaces, human body communication, brain-channel communication for untethered neural implants, physical-layer security, low-power wireless and wireline techniques<\/li>\n<\/ul>\n\n\n\n<hr class=\"wp-block-separator has-alpha-channel-opacity is-style-wide\" \/>\n\n\n\n<h6 class=\"wp-block-heading\">&#8212; SUMMER RESEARCH INTERN (PH.D.)<\/h6>\n\n\n\n<h6 class=\"wp-block-heading\">QUANTUM COMPUTING HARDWARE\/RF CIRCUITS AND SYSTEMS, <a href=\"https:\/\/research.ibm.com\/labs\/watson\/\" target=\"_blank\" rel=\"noopener\">IBM T. J. WATSON RESEARCH CENTER<\/a>, YORKTOWN HEIGHTS, NY, USA (May, 2021 &#8211; Aug, 2021)<\/h6>\n\n\n\n<ul class=\"wp-block-list\">\n<li>Worked as a Summer Intern on RF readout circuitry for Quantum Computing Applications<\/li>\n<\/ul>\n\n\n\n<hr class=\"wp-block-separator has-alpha-channel-opacity is-style-wide\" \/>\n\n\n\n<h6 class=\"wp-block-heading\">&#8212; SUMMER RESEARCH INTERN (PH.D.)<\/h6>\n\n\n\n<h6 class=\"wp-block-heading\">QUANTUM COMPUTING HARDWARE\/RF CIRCUITS AND SYSTEMS, <a href=\"https:\/\/research.ibm.com\/labs\/watson\/\" target=\"_blank\" rel=\"noopener\">IBM T. J. WATSON RESEARCH CENTER<\/a>, YORKTOWN HEIGHTS, NY, USA (June, 2020 &#8211; Aug, 2020)<\/h6>\n\n\n\n<ul class=\"wp-block-list\">\n<li>Worked as a Summer Intern on RF control circuitry and Clocking for Quantum Computing Applications<\/li>\n<\/ul>\n\n\n\n<hr class=\"wp-block-separator has-alpha-channel-opacity is-style-wide\" \/>\n\n\n\n<h6 class=\"wp-block-heading\">\u200b\u200b&#8212; Senior Digital Design Engineer<\/h6>\n\n\n\n<h6 class=\"wp-block-heading\"><a href=\"https:\/\/www.intel.in\/content\/www\/in\/en\/homepage.html\" target=\"_blank\" rel=\"noopener\">Intel Corporation<\/a>, Bangalore, India (Mar, 2017 &#8211; May, 2017)<\/h6>\n\n\n\n<ul class=\"wp-block-list\">\n<li>Worked on the Client\/Server Processor Core Architectures and Low Power Circuit Design Methodologies<\/li>\n<\/ul>\n\n\n\n<hr class=\"wp-block-separator has-alpha-channel-opacity is-style-wide\" \/>\n\n\n\n<h6 class=\"wp-block-heading\">&#8212; Digital Design Engineer<\/h6>\n\n\n\n<h6 class=\"wp-block-heading\"><a href=\"https:\/\/www.intel.in\/content\/www\/in\/en\/homepage.html\" target=\"_blank\" rel=\"noopener\">Intel Corporation<\/a>, Bangalore, India (July, 2015 &#8211; Feb, 2017)<\/h6>\n\n\n\n<ul class=\"wp-block-list\">\n<li>Worked as a Back-End Circuit Design Engineer for 7th-10th generation Intel Processors for Client\/Server applications.<\/li>\n\n\n\n<li>Was a part of cross-site collaboration among Intel BDC (Bangalore, India), IDC (Haifa, Israel) and Folsom.<\/li>\n\n\n\n<li>Owned a horizontal responsibility as an Optimization Expert wherein the goal was to obtain a sweet spot among Speed, Power and Quality. This role is oriented towards the study and development of a sustainable cost function for present and future projects<\/li>\n\n\n\n<li>Received cluster and business unit (BU) level innovation awards for developing multiple automations that helped to speed up the flows and potentially increased the productivity of the designers<\/li>\n<\/ul>\n\n\n\n<hr class=\"wp-block-separator has-alpha-channel-opacity is-style-wide\" \/>\n\n\n\n<h6 class=\"wp-block-heading\">&#8212; R&amp;D Engineer<\/h6>\n\n\n\n<h6 class=\"wp-block-heading\"><a href=\"https:\/\/tejasnetworks.com\/northamerica\/\" target=\"_blank\" rel=\"noopener\">Tejas Networks Pvt. Ltd.<\/a>, Bangalore, India (June, 2011 &#8211; July, 2012)<\/h6>\n\n\n\n<ul class=\"wp-block-list\">\n<li>The role was oriented towards front-end IP development and test using FPGA based platforms for telecom applications.<\/li>\n\n\n\n<li>Worked as an RTL Engineer on a Circuit Emulation based project to send voice data over asynchronous Ethernet Networks<\/li>\n\n\n\n<li>Worked in the testing and verification team of the POTP (Packet Optical Transport Platform) group<\/li>\n<\/ul>\n","protected":false},"excerpt":{"rendered":"<p>&#8212; ASSISTANT PROFESSOR (NELMS RISING STAR ENDOWED PROFESSOR) ECE, UNIVERSITY OF FLORIDA, GAINESVILLE, FL, USA (Aug, 2022 &#8211; Present) &#8212; SUMMER RESEARCH INTERN (PH.D.) QUANTUM COMPUTING HARDWARE\/RF CIRCUITS AND SYSTEMS, IBM T. J. WATSON RESEARCH CENTER, YORKTOWN HEIGHTS, NY, USA (May, 2021 &#8211; Aug, 2021) &#8212; SUMMER RESEARCH INTERN (PH.D.) QUANTUM COMPUTING HARDWARE\/RF CIRCUITS AND [&hellip;]<\/p>\n","protected":false},"author":1337,"featured_media":0,"parent":375,"menu_order":1,"comment_status":"closed","ping_status":"closed","template":"page-templates\/page-section-nav.php","meta":{"_acf_changed":false,"inline_featured_image":false,"featured_post":"","footnotes":"","_links_to":"","_links_to_target":""},"class_list":["post-47","page","type-page","status-publish","hentry"],"acf":[],"_links":{"self":[{"href":"https:\/\/faculty.eng.ufl.edu\/chatterjee\/wp-json\/wp\/v2\/pages\/47","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/faculty.eng.ufl.edu\/chatterjee\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/faculty.eng.ufl.edu\/chatterjee\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/faculty.eng.ufl.edu\/chatterjee\/wp-json\/wp\/v2\/users\/1337"}],"replies":[{"embeddable":true,"href":"https:\/\/faculty.eng.ufl.edu\/chatterjee\/wp-json\/wp\/v2\/comments?post=47"}],"version-history":[{"count":3,"href":"https:\/\/faculty.eng.ufl.edu\/chatterjee\/wp-json\/wp\/v2\/pages\/47\/revisions"}],"predecessor-version":[{"id":3949,"href":"https:\/\/faculty.eng.ufl.edu\/chatterjee\/wp-json\/wp\/v2\/pages\/47\/revisions\/3949"}],"up":[{"embeddable":true,"href":"https:\/\/faculty.eng.ufl.edu\/chatterjee\/wp-json\/wp\/v2\/pages\/375"}],"wp:attachment":[{"href":"https:\/\/faculty.eng.ufl.edu\/chatterjee\/wp-json\/wp\/v2\/media?parent=47"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}